gcc/0077-LoongArch-Clean-up-vec_init-expander.patch

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From 38438021c770f077b78092299f22712fdd734814 Mon Sep 17 00:00:00 2001
From: Xi Ruoyao <xry111@xry111.site>
Date: Tue, 19 Dec 2023 05:02:42 +0800
Subject: [PATCH 077/188] LoongArch: Clean up vec_init expander
Non functional change, clean up the code.
gcc/ChangeLog:
* config/loongarch/loongarch.cc
(loongarch_expand_vector_init_same): Remove "temp2" and reuse
"temp" instead.
(loongarch_expand_vector_init): Use gcc_unreachable () instead
of gcc_assert (0), and fix the comment for it.
---
gcc/config/loongarch/loongarch.cc | 18 +++++++++---------
1 file changed, 9 insertions(+), 9 deletions(-)
diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
index 000d2d623..3aeafeafd 100644
--- a/gcc/config/loongarch/loongarch.cc
+++ b/gcc/config/loongarch/loongarch.cc
@@ -10723,7 +10723,7 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar)
machine_mode vmode = GET_MODE (target);
machine_mode imode = GET_MODE_INNER (vmode);
rtx same = XVECEXP (vals, 0, 0);
- rtx temp, temp2;
+ rtx temp;
if (CONST_INT_P (same) && nvar == 0
&& loongarch_signed_immediate_p (INTVAL (same), 10, 0))
@@ -10747,17 +10747,17 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar)
}
if (imode == GET_MODE (same))
- temp2 = same;
+ temp = same;
else if (GET_MODE_SIZE (imode) >= UNITS_PER_WORD)
{
if (GET_CODE (same) == MEM)
{
rtx reg_tmp = gen_reg_rtx (GET_MODE (same));
loongarch_emit_move (reg_tmp, same);
- temp2 = simplify_gen_subreg (imode, reg_tmp, GET_MODE (reg_tmp), 0);
+ temp = simplify_gen_subreg (imode, reg_tmp, GET_MODE (reg_tmp), 0);
}
else
- temp2 = simplify_gen_subreg (imode, same, GET_MODE (same), 0);
+ temp = simplify_gen_subreg (imode, same, GET_MODE (same), 0);
}
else
{
@@ -10765,13 +10765,13 @@ loongarch_expand_vector_init_same (rtx target, rtx vals, unsigned nvar)
{
rtx reg_tmp = gen_reg_rtx (GET_MODE (same));
loongarch_emit_move (reg_tmp, same);
- temp2 = lowpart_subreg (imode, reg_tmp, GET_MODE (reg_tmp));
+ temp = lowpart_subreg (imode, reg_tmp, GET_MODE (reg_tmp));
}
else
- temp2 = lowpart_subreg (imode, same, GET_MODE (same));
+ temp = lowpart_subreg (imode, same, GET_MODE (same));
}
- temp = force_reg (imode, temp2);
+ temp = force_reg (imode, temp);
switch (vmode)
{
@@ -11117,8 +11117,8 @@ loongarch_expand_vector_init (rtx target, rtx vals)
return;
}
- /* Loongson is the only cpu with vectors with more elements. */
- gcc_assert (0);
+ /* No LoongArch CPU supports vectors with more elements as at now. */
+ gcc_unreachable ();
}
/* Implement HARD_REGNO_CALLER_SAVE_MODE. */
--
2.43.0