195 lines
8.7 KiB
Diff
195 lines
8.7 KiB
Diff
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From 4a2d0bdf5c9a5f4ee615c1d0768cb2e8a3dfef4a Mon Sep 17 00:00:00 2001
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From: Richard Sandiford <richard.sandiford@arm.com>
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Date: Thu, 29 Sep 2022 11:32:54 +0100
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Subject: [PATCH 018/157] [Backport][SME] aarch64: Reorder an entry in
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aarch64-option-extensions.def
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Reference: https://gcc.gnu.org/git/?p=gcc.git;a=commit;h=c067c474f85b1e9c56fb34dd51ef0eec9221b766
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aarch64-option-extensions.def was topologically sorted except
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for one case: crypto came before its aes and sha2 dependencies.
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This patch moves crypto after sha2 instead.
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gcc/
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* config/aarch64/aarch64-option-extensions.def: Move crypto
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after sha2.
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gcc/testsuite/
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* gcc.target/aarch64/cpunative/native_cpu_0.c: Expect +crypto
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to come after +crc.
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* gcc.target/aarch64/cpunative/native_cpu_13.c: Likewise.
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* gcc.target/aarch64/cpunative/native_cpu_16.c: Likewise.
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* gcc.target/aarch64/cpunative/native_cpu_17.c: Likewise.
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* gcc.target/aarch64/cpunative/native_cpu_6.c: Likewise.
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* gcc.target/aarch64/cpunative/native_cpu_7.c: Likewise.
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* gcc.target/aarch64/options_set_2.c: Likewise.
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* gcc.target/aarch64/options_set_3.c: Likewise.
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* gcc.target/aarch64/options_set_4.c: Likewise.
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---
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.../aarch64/aarch64-option-extensions.def | 20 +++++++++----------
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.../aarch64/cpunative/native_cpu_0.c | 2 +-
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.../aarch64/cpunative/native_cpu_13.c | 2 +-
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.../aarch64/cpunative/native_cpu_16.c | 2 +-
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.../aarch64/cpunative/native_cpu_17.c | 2 +-
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.../aarch64/cpunative/native_cpu_6.c | 2 +-
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.../aarch64/cpunative/native_cpu_7.c | 2 +-
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.../gcc.target/aarch64/options_set_2.c | 2 +-
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.../gcc.target/aarch64/options_set_3.c | 2 +-
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.../gcc.target/aarch64/options_set_4.c | 4 ++--
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10 files changed, 20 insertions(+), 20 deletions(-)
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diff --git a/gcc/config/aarch64/aarch64-option-extensions.def b/gcc/config/aarch64/aarch64-option-extensions.def
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index b98008127..df2c8d19b 100644
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--- a/gcc/config/aarch64/aarch64-option-extensions.def
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+++ b/gcc/config/aarch64/aarch64-option-extensions.def
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@@ -76,16 +76,6 @@ AARCH64_OPT_EXTENSION("simd", AARCH64_FL_SIMD, AARCH64_FL_FP, \
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AARCH64_FL_I8MM | AARCH64_FL_F32MM | AARCH64_FL_F64MM, \
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false, "asimd")
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-/* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2".
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- Disabling "crypto" disables "crypto", "aes", "sha2", "sha3" and "sm3/sm4",
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- "sve2-aes", "sve2-sha3", "sve2-sm4". */
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-AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | \
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- AARCH64_FL_SIMD | AARCH64_FL_AES | AARCH64_FL_SHA2, \
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- AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | \
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- AARCH64_FL_SM4 | AARCH64_FL_SVE2_AES | \
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- AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4, true, \
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- "aes pmull sha1 sha2")
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-
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/* Enabling or disabling "crc" only changes "crc". */
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AARCH64_OPT_EXTENSION("crc", AARCH64_FL_CRC, 0, 0, false, "crc32")
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@@ -127,6 +117,16 @@ AARCH64_OPT_EXTENSION("sha2", AARCH64_FL_SHA2, AARCH64_FL_FPSIMD, \
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AARCH64_FL_CRYPTO | AARCH64_FL_SHA3 | \
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AARCH64_FL_SVE2_SHA3, false, "sha1 sha2")
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+/* Enabling "crypto" also enables "fp", "simd", "aes" and "sha2".
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+ Disabling "crypto" disables "crypto", "aes", "sha2", "sha3" and "sm3/sm4",
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+ "sve2-aes", "sve2-sha3", "sve2-sm4". */
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+AARCH64_OPT_EXTENSION("crypto", AARCH64_FL_CRYPTO, AARCH64_FL_FP | \
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+ AARCH64_FL_SIMD | AARCH64_FL_AES | AARCH64_FL_SHA2, \
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+ AARCH64_FL_AES | AARCH64_FL_SHA2 | AARCH64_FL_SHA3 | \
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+ AARCH64_FL_SM4 | AARCH64_FL_SVE2_AES | \
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+ AARCH64_FL_SVE2_SHA3 | AARCH64_FL_SVE2_SM4, true, \
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+ "aes pmull sha1 sha2")
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+
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/* Enabling "sha3" enables "simd" and "sha2".
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Disabling "sha3" disables "sha3" and "sve2-sha3". */
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AARCH64_OPT_EXTENSION("sha3", AARCH64_FL_SHA3, AARCH64_FL_FPSIMD | \
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diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
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index f155f51ba..8499f87c3 100644
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--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
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+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_0.c
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@@ -7,6 +7,6 @@ int main()
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return 0;
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}
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-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod} } } */
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+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
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/* Test a normal looking procinfo. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
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index b7b3a8e13..551669091 100644
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--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
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+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_13.c
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@@ -7,6 +7,6 @@ int main()
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return 0;
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}
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-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod} } } */
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+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto} } } */
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/* Test one with mixed order of feature bits. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
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index a424e7c56..2f963bb23 100644
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--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
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+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_16.c
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@@ -7,6 +7,6 @@ int main()
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return 0;
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}
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-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
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+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */
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/* Test a normal looking procinfo. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
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index c269c5fef..c68a697aa 100644
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--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
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+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_17.c
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@@ -7,6 +7,6 @@ int main()
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return 0;
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}
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-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+crc\+dotprod\+sve2} } } */
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+/* { dg-final { scan-assembler {\.arch armv8-a\+crc\+dotprod\+crypto\+sve2} } } */
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/* Test a normal looking procinfo. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
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index da72052e6..7608e8845 100644
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--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
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+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_6.c
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@@ -7,7 +7,7 @@ int main()
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return 0;
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}
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-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+fp16} } } */
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+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
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/* Test one where the feature bits for crypto and fp16 are given in
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same order as declared in options file. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
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index 96ad4c14d..72b14b4f6 100644
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--- a/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
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+++ b/gcc/testsuite/gcc.target/aarch64/cpunative/native_cpu_7.c
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@@ -7,7 +7,7 @@ int main()
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return 0;
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}
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-/* { dg-final { scan-assembler {\.arch armv8-a\+crypto\+fp16} } } */
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+/* { dg-final { scan-assembler {\.arch armv8-a\+fp16\+crypto} } } */
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/* Test one where the crypto and fp16 options are specified in different
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order from what is in the options file. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_2.c b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
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index 3476febce..f82cb5f78 100644
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--- a/gcc/testsuite/gcc.target/aarch64/options_set_2.c
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+++ b/gcc/testsuite/gcc.target/aarch64/options_set_2.c
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@@ -6,6 +6,6 @@ int main ()
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return 0;
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}
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-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crypto\+crc} 1 } } */
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+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
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/* Check to see if crc and crypto are maintained if crypto specified. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_3.c b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
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index 4558339f1..7d350cfa3 100644
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--- a/gcc/testsuite/gcc.target/aarch64/options_set_3.c
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+++ b/gcc/testsuite/gcc.target/aarch64/options_set_3.c
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@@ -6,6 +6,6 @@ int main ()
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return 0;
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}
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-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crypto\+crc} 1 } } */
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+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
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/* Check if smallest set is maintained when outputting. */
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diff --git a/gcc/testsuite/gcc.target/aarch64/options_set_4.c b/gcc/testsuite/gcc.target/aarch64/options_set_4.c
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index 15514bfe9..5370e02e1 100644
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--- a/gcc/testsuite/gcc.target/aarch64/options_set_4.c
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+++ b/gcc/testsuite/gcc.target/aarch64/options_set_4.c
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@@ -6,7 +6,7 @@ int main ()
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return 0;
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}
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-/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crypto\+crc} 1 } } */
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+/* { dg-final { scan-assembler-times {\.arch armv8\.2\-a\+crc\+crypto} 1 } } */
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/* Check if individual bits that make up a grouping is specified that only the
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- grouping is kept. */
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\ No newline at end of file
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+ grouping is kept. */
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--
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2.33.0
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