79 lines
2.9 KiB
Diff
79 lines
2.9 KiB
Diff
From e5c0e4b416b8628585e27b524ba524261cacf713 Mon Sep 17 00:00:00 2001
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From: Jiahao Xu <xujiahao@loongson.cn>
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Date: Thu, 14 Dec 2023 20:49:04 +0800
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Subject: [PATCH 078/188] LoongArch: Fix incorrect code generation for sad
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pattern
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When I attempt to enable vect_usad_char effective target for LoongArch, slp-reduc-sad.c
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and vect-reduc-sad*.c tests fail. These tests fail because the sad pattern generates bad
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code. This patch to fixed them, for sad patterns, use zero expansion instead of sign
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expansion for reduction.
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Currently, we are fixing failed vectorized tests, and in the future, we will
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enable more tests of "vect" for LoongArch.
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gcc/ChangeLog:
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* config/loongarch/lasx.md: Use zero expansion instruction.
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* config/loongarch/lsx.md: Ditto.
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---
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gcc/config/loongarch/lasx.md | 8 ++++----
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gcc/config/loongarch/lsx.md | 8 ++++----
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2 files changed, 8 insertions(+), 8 deletions(-)
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diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
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index 921ce0eeb..9ca3f9278 100644
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--- a/gcc/config/loongarch/lasx.md
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+++ b/gcc/config/loongarch/lasx.md
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@@ -5021,8 +5021,8 @@
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rtx t2 = gen_reg_rtx (V16HImode);
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rtx t3 = gen_reg_rtx (V8SImode);
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emit_insn (gen_lasx_xvabsd_u_bu (t1, operands[1], operands[2]));
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- emit_insn (gen_lasx_xvhaddw_h_b (t2, t1, t1));
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- emit_insn (gen_lasx_xvhaddw_w_h (t3, t2, t2));
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+ emit_insn (gen_lasx_xvhaddw_hu_bu (t2, t1, t1));
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+ emit_insn (gen_lasx_xvhaddw_wu_hu (t3, t2, t2));
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emit_insn (gen_addv8si3 (operands[0], t3, operands[3]));
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DONE;
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})
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@@ -5038,8 +5038,8 @@
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rtx t2 = gen_reg_rtx (V16HImode);
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rtx t3 = gen_reg_rtx (V8SImode);
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emit_insn (gen_lasx_xvabsd_s_b (t1, operands[1], operands[2]));
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- emit_insn (gen_lasx_xvhaddw_h_b (t2, t1, t1));
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- emit_insn (gen_lasx_xvhaddw_w_h (t3, t2, t2));
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+ emit_insn (gen_lasx_xvhaddw_hu_bu (t2, t1, t1));
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+ emit_insn (gen_lasx_xvhaddw_wu_hu (t3, t2, t2));
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emit_insn (gen_addv8si3 (operands[0], t3, operands[3]));
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DONE;
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})
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diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md
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index 57e0ee3d4..7f5fff40a 100644
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--- a/gcc/config/loongarch/lsx.md
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+++ b/gcc/config/loongarch/lsx.md
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@@ -3385,8 +3385,8 @@
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rtx t2 = gen_reg_rtx (V8HImode);
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rtx t3 = gen_reg_rtx (V4SImode);
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emit_insn (gen_lsx_vabsd_u_bu (t1, operands[1], operands[2]));
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- emit_insn (gen_lsx_vhaddw_h_b (t2, t1, t1));
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- emit_insn (gen_lsx_vhaddw_w_h (t3, t2, t2));
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+ emit_insn (gen_lsx_vhaddw_hu_bu (t2, t1, t1));
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+ emit_insn (gen_lsx_vhaddw_wu_hu (t3, t2, t2));
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emit_insn (gen_addv4si3 (operands[0], t3, operands[3]));
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DONE;
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})
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@@ -3402,8 +3402,8 @@
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rtx t2 = gen_reg_rtx (V8HImode);
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rtx t3 = gen_reg_rtx (V4SImode);
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emit_insn (gen_lsx_vabsd_s_b (t1, operands[1], operands[2]));
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- emit_insn (gen_lsx_vhaddw_h_b (t2, t1, t1));
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- emit_insn (gen_lsx_vhaddw_w_h (t3, t2, t2));
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+ emit_insn (gen_lsx_vhaddw_hu_bu (t2, t1, t1));
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+ emit_insn (gen_lsx_vhaddw_wu_hu (t3, t2, t2));
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emit_insn (gen_addv4si3 (operands[0], t3, operands[3]));
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DONE;
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})
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--
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2.43.0
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