182 lines
4.7 KiB
Diff
182 lines
4.7 KiB
Diff
From 907b35525c8abcdfe22152ebce6640dbe3905cce Mon Sep 17 00:00:00 2001
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From: Yang Yujie <yangyujie@loongson.cn>
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Date: Mon, 8 Jan 2024 09:14:09 +0800
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Subject: [PATCH 105/188] LoongArch: Use enums for constants
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Target features constants from loongarch-def.h are currently defined as macros.
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Switch to enums for better look in the debugger.
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gcc/ChangeLog:
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* config/loongarch/loongarch-def.h: Define constants with
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enums instead of Macros.
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---
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gcc/config/loongarch/loongarch-def.h | 115 ++++++++++++++++-----------
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1 file changed, 67 insertions(+), 48 deletions(-)
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diff --git a/gcc/config/loongarch/loongarch-def.h b/gcc/config/loongarch/loongarch-def.h
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index a133ea265..28da3ae5f 100644
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--- a/gcc/config/loongarch/loongarch-def.h
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+++ b/gcc/config/loongarch/loongarch-def.h
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@@ -23,12 +23,10 @@ along with GCC; see the file COPYING3. If not see
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- ISA extensions (isa_ext),
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- base ABI types (abi_base),
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- ABI extension types (abi_ext).
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-
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- - code models (cmodel)
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- - other command-line switches (switch)
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+ - code models (cmodel)
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These values are primarily used for implementing option handling
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- logic in "loongarch.opt", "loongarch-driver.c" and "loongarch-opt.c".
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+ logic in "loongarch.opt", "loongarch-driver.cc" and "loongarch-opt.cc".
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As for the result of this option handling process, the following
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scheme is adopted to represent the final configuration:
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@@ -53,30 +51,40 @@ along with GCC; see the file COPYING3. If not see
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#include "loongarch-def-array.h"
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#include "loongarch-tune.h"
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-/* enum isa_base */
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-/* LoongArch64 */
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-#define ISA_BASE_LA64 0
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-#define N_ISA_BASE_TYPES 1
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+/* ISA base */
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+enum {
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+ ISA_BASE_LA64 = 0, /* LoongArch64 */
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+ N_ISA_BASE_TYPES = 1
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+};
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+
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extern loongarch_def_array<const char *, N_ISA_BASE_TYPES>
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loongarch_isa_base_strings;
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-/* enum isa_ext_* */
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-#define ISA_EXT_NONE 0
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-#define ISA_EXT_FPU32 1
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-#define ISA_EXT_FPU64 2
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-#define N_ISA_EXT_FPU_TYPES 3
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-#define ISA_EXT_SIMD_LSX 3
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-#define ISA_EXT_SIMD_LASX 4
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-#define N_ISA_EXT_TYPES 5
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+
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+/* ISA extensions */
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+enum {
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+ ISA_EXT_NONE = 0,
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+ ISA_EXT_FPU32 = 1,
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+ ISA_EXT_FPU64 = 2,
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+ N_ISA_EXT_FPU_TYPES = 3,
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+ ISA_EXT_SIMD_LSX = 3,
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+ ISA_EXT_SIMD_LASX = 4,
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+ N_ISA_EXT_TYPES = 5
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+};
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+
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extern loongarch_def_array<const char *, N_ISA_EXT_TYPES>
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loongarch_isa_ext_strings;
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-/* enum abi_base */
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-#define ABI_BASE_LP64D 0
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-#define ABI_BASE_LP64F 1
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-#define ABI_BASE_LP64S 2
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-#define N_ABI_BASE_TYPES 3
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+
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+/* Base ABI */
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+enum {
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+ ABI_BASE_LP64D = 0,
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+ ABI_BASE_LP64F = 1,
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+ ABI_BASE_LP64S = 2,
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+ N_ABI_BASE_TYPES = 3
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+};
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+
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extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
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loongarch_abi_base_strings;
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@@ -90,28 +98,38 @@ extern loongarch_def_array<const char *, N_ABI_BASE_TYPES>
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(abi_base == ABI_BASE_LP64S)
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-/* enum abi_ext */
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-#define ABI_EXT_BASE 0
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-#define N_ABI_EXT_TYPES 1
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+/* ABI Extension */
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+enum {
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+ ABI_EXT_BASE = 0,
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+ N_ABI_EXT_TYPES = 1
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+};
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+
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extern loongarch_def_array<const char *, N_ABI_EXT_TYPES>
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loongarch_abi_ext_strings;
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-/* enum cmodel */
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-#define CMODEL_NORMAL 0
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-#define CMODEL_TINY 1
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-#define CMODEL_TINY_STATIC 2
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-#define CMODEL_MEDIUM 3
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-#define CMODEL_LARGE 4
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-#define CMODEL_EXTREME 5
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-#define N_CMODEL_TYPES 6
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+
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+/* Code Model */
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+enum {
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+ CMODEL_NORMAL = 0,
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+ CMODEL_TINY = 1,
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+ CMODEL_TINY_STATIC = 2,
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+ CMODEL_MEDIUM = 3,
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+ CMODEL_LARGE = 4,
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+ CMODEL_EXTREME = 5,
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+ N_CMODEL_TYPES = 6
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+};
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+
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extern loongarch_def_array<const char *, N_CMODEL_TYPES>
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loongarch_cmodel_strings;
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-/* enum explicit_relocs */
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-#define EXPLICIT_RELOCS_AUTO 0
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-#define EXPLICIT_RELOCS_NONE 1
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-#define EXPLICIT_RELOCS_ALWAYS 2
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-#define N_EXPLICIT_RELOCS_TYPES 3
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+
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+/* Explicit Reloc Type */
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+enum {
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+ EXPLICIT_RELOCS_AUTO = 0,
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+ EXPLICIT_RELOCS_NONE = 1,
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+ EXPLICIT_RELOCS_ALWAYS = 2,
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+ N_EXPLICIT_RELOCS_TYPES = 3
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+};
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/* The common default value for variables whose assignments
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are triggered by command-line options. */
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@@ -159,17 +177,18 @@ struct loongarch_target
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int cmodel; /* CMODEL_ */
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};
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-/* CPU properties. */
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-/* index */
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-#define CPU_NATIVE 0
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-#define CPU_ABI_DEFAULT 1
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-#define CPU_LOONGARCH64 2
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-#define CPU_LA464 3
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-#define CPU_LA664 4
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-#define N_ARCH_TYPES 5
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-#define N_TUNE_TYPES 5
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-
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-/* parallel tables. */
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+/* CPU model */
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+enum {
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+ CPU_NATIVE = 0,
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+ CPU_ABI_DEFAULT = 1,
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+ CPU_LOONGARCH64 = 2,
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+ CPU_LA464 = 3,
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+ CPU_LA664 = 4,
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+ N_ARCH_TYPES = 5,
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+ N_TUNE_TYPES = 5
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+};
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+
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+/* CPU model properties */
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extern loongarch_def_array<const char *, N_ARCH_TYPES>
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loongarch_cpu_strings;
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extern loongarch_def_array<loongarch_isa, N_ARCH_TYPES>
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--
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2.43.0
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