679 lines
22 KiB
Diff
679 lines
22 KiB
Diff
From 9af73fb7213d5c10b3683465e6682ad20f5abe64 Mon Sep 17 00:00:00 2001
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From: Yang Yujie <yangyujie@loongson.cn>
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Date: Tue, 23 Apr 2024 10:42:48 +0800
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Subject: [PATCH 165/188] LoongArch: Define builtin macros for ISA evolutions
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Detailed description of these definitions can be found at
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https://github.com/loongson/la-toolchain-conventions, which
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the LoongArch GCC port aims to conform to.
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gcc/ChangeLog:
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* config.gcc: Add loongarch-evolution.o.
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* config/loongarch/genopts/genstr.sh: Enable generation of
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loongarch-evolution.[cc,h].
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* config/loongarch/t-loongarch: Likewise.
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* config/loongarch/genopts/gen-evolution.awk: New file.
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* config/loongarch/genopts/isa-evolution.in: Mark ISA version
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of introduction for each ISA evolution feature.
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* config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
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Define builtin macros for enabled ISA evolutions and the ISA
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version.
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* config/loongarch/loongarch-cpu.cc: Use loongarch-evolution.h.
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* config/loongarch/loongarch.h: Likewise.
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* config/loongarch/loongarch-cpucfg-map.h: Delete.
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* config/loongarch/loongarch-evolution.cc: New file.
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* config/loongarch/loongarch-evolution.h: New file.
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* config/loongarch/loongarch-opts.h (ISA_HAS_FRECIPE): Define.
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(ISA_HAS_DIV32): Likewise.
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(ISA_HAS_LAM_BH): Likewise.
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(ISA_HAS_LAMCAS): Likewise.
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(ISA_HAS_LD_SEQ_SA): Likewise.
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---
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gcc/config.gcc | 2 +-
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.../loongarch/genopts/gen-evolution.awk | 230 ++++++++++++++++++
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gcc/config/loongarch/genopts/genstr.sh | 82 ++-----
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gcc/config/loongarch/genopts/isa-evolution.in | 10 +-
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gcc/config/loongarch/loongarch-c.cc | 23 ++
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gcc/config/loongarch/loongarch-cpu.cc | 2 +-
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gcc/config/loongarch/loongarch-evolution.cc | 60 +++++
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...rch-cpucfg-map.h => loongarch-evolution.h} | 46 +++-
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gcc/config/loongarch/loongarch-opts.h | 11 -
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gcc/config/loongarch/loongarch.h | 1 +
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gcc/config/loongarch/t-loongarch | 26 +-
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11 files changed, 398 insertions(+), 95 deletions(-)
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create mode 100644 gcc/config/loongarch/genopts/gen-evolution.awk
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create mode 100644 gcc/config/loongarch/loongarch-evolution.cc
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rename gcc/config/loongarch/{loongarch-cpucfg-map.h => loongarch-evolution.h} (52%)
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diff --git a/gcc/config.gcc b/gcc/config.gcc
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index c6820d0f1..a405e6d2e 100644
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--- a/gcc/config.gcc
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+++ b/gcc/config.gcc
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@@ -458,7 +458,7 @@ loongarch*-*-*)
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cpu_type=loongarch
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d_target_objs="loongarch-d.o"
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extra_headers="larchintrin.h lsxintrin.h lasxintrin.h"
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- extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o loongarch-opts.o loongarch-def.o"
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+ extra_objs="loongarch-c.o loongarch-builtins.o loongarch-cpu.o loongarch-opts.o loongarch-def.o loongarch-evolution.o"
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extra_gcc_objs="loongarch-driver.o loongarch-cpu.o loongarch-opts.o loongarch-def.o"
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extra_options="${extra_options} g.opt fused-madd.opt"
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;;
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diff --git a/gcc/config/loongarch/genopts/gen-evolution.awk b/gcc/config/loongarch/genopts/gen-evolution.awk
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new file mode 100644
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index 000000000..4d105afa9
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--- /dev/null
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+++ b/gcc/config/loongarch/genopts/gen-evolution.awk
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@@ -0,0 +1,230 @@
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+#!/usr/bin/gawk
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+#
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+# A simple script that generates loongarch-evolution.h
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+# from genopts/isa-evolution.in
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+#
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+# Copyright (C) 2021-2024 Free Software Foundation, Inc.
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+#
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+# This file is part of GCC.
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+#
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+# GCC is free software; you can redistribute it and/or modify it under
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+# the terms of the GNU General Public License as published by the Free
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+# Software Foundation; either version 3, or (at your option) any later
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+# version.
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+#
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+# GCC is distributed in the hope that it will be useful, but WITHOUT
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+# ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
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+# or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
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+# License for more details.
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+#
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+# You should have received a copy of the GNU General Public License
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+# along with GCC; see the file COPYING3. If not see
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+# <http://www.gnu.org/licenses/>.
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+
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+BEGIN {
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+ # isa_version_major[]
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+ # isa_version_minor[]
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+ # cpucfg_word[]
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+ # cpucfg_bit_in_word[]
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+ # name_capitalized[]
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+ # comment[]
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+}
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+
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+{
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+ cpucfg_word[NR] = $1
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+ cpucfg_bit_in_word[NR] = $2
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+ name[NR] = gensub(/-/, "_", "g", $3)
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+ name_capitalized[NR] = toupper(name[NR])
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+ isa_version_major[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\1", 1, $4)
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+ isa_version_minor[NR] = gensub(/^([1-9][0-9]*)\.([0-9]+)$/, "\\2", 1, $4)
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+
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+ $1 = $2 = $3 = $4 = ""
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+ sub (/^\s*/, "")
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+ comment[NR] = $0
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+}
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+
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+function copyright_header(from_year,to_year)
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+{
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+ print " Copyright (C) " from_year "-" to_year \
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+ " Free Software Foundation, Inc."
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+ print ""
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+ print "This file is part of GCC."
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+ print ""
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+ print "GCC is free software; you can redistribute it and/or modify"
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+ print "it under the terms of the GNU General Public License as published by"
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+ print "the Free Software Foundation; either version 3, or (at your option)"
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+ print "any later version."
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+ print ""
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+ print "GCC is distributed in the hope that it will be useful,"
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+ print "but WITHOUT ANY WARRANTY; without even the implied warranty of"
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+ print "MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the"
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+ print "GNU General Public License for more details."
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+ print ""
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+ print "You should have received a copy of the GNU General Public License"
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+ print "along with GCC; see the file COPYING3. If not see"
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+ print "<http://www.gnu.org/licenses/>."
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+}
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+
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+function gen_cpucfg_map()
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+{
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+ print "static constexpr struct {"
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+ print " int cpucfg_word;"
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+ print " unsigned int cpucfg_bit;"
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+ print " HOST_WIDE_INT isa_evolution_bit;"
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+ print "} cpucfg_map[] = {"
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+
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+ for (i = 1; i <= NR; i++)
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+ printf (" { %d, 1u << %d, OPTION_MASK_ISA_%s },\n",
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+ cpucfg_word[i], cpucfg_bit_in_word[i], name_capitalized[i])
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+
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+ print "};"
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+}
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+
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+function gen_cpucfg_useful_idx()
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+{
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+ split("0 1 2 16 17 18 19", init_useful_idx)
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+
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+ delete idx_bucket
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+
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+ for (i in init_useful_idx)
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+ idx_bucket[init_useful_idx[i]] = 1
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+ delete init_useful_idx
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+
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+ for (i in cpucfg_word)
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+ idx_bucket[cpucfg_word[i]] = 1
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+
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+ delete idx_list
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+ for (i in idx_bucket)
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+ idx_list[length(idx_list)-1] = i+0
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+ delete idx_bucket
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+
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+ asort (idx_list)
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+
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+ print "static constexpr int cpucfg_useful_idx[] = {"
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+ for (i in idx_list)
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+ printf(" %d,\n", idx_list[i])
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+ print "};"
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+
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+ print ""
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+
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+ printf ("static constexpr int N_CPUCFG_WORDS = %d;\n",
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+ idx_list[length(idx_list)] + 1)
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+
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+ delete idx_list
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+}
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+
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+function gen_evolution_decl()
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+{
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+ print "/* ISA evolution features */"
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+ print "enum {"
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+
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+ for (i = 1; i <= NR; i++)
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+ print " EVO_" name_capitalized[i] " = " i - 1 ","
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+
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+ print " N_EVO_FEATURES = " NR
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+ print "};"
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+ print ""
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+
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+ print "/* Condition macros */"
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+ for (i = 1; i <= NR; i++)
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+ printf ("#define ISA_HAS_%s \\\n" \
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+ " (la_target.isa.evolution & OPTION_MASK_ISA_%s)\n",
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+ name_capitalized[i], name_capitalized[i])
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+ print ""
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+
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+ print "/* Bitmasks on la_target.isa.evolution. */"
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+ print "extern int la_evo_feature_masks[N_EVO_FEATURES];"
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+ print ""
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+ print "/* Builtin macro names for the evolution features. */"
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+ print "extern const char* la_evo_macro_name[N_EVO_FEATURES];"
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+ print ""
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+ print "/* The ISA version where a specific feature is introduced. */"
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+ print "extern int la_evo_version_major[N_EVO_FEATURES];"
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+ print "extern int la_evo_version_minor[N_EVO_FEATURES];"
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+}
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+
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+function gen_full_header()
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+{
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+ print "/* Generated automatically by \"genstr\" from \"isa-evolution.in\"."
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+ print " Please do not edit this file directly."
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+ print ""
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+
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+ copyright_header(2023, 2024)
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+
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+ print "*/"
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+ print ""
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+
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+ print "#ifndef LOONGARCH_EVOLUTION_H"
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+ print "#define LOONGARCH_EVOLUTION_H"
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+ print ""
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+ print "#if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS) && !defined(IN_RTS)"
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+ print ""
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+ print "#include \"options.h\""
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+ print ""
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+
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+ gen_cpucfg_map()
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+
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+ print ""
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+
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+ gen_cpucfg_useful_idx()
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+
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+ print ""
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+
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+ gen_evolution_decl()
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+
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+ print ""
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+ print "#endif"
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+ print ""
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+ print "#endif /* LOONGARCH_EVOLUTION_H */"
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+}
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+
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+
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+function gen_full_source()
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+{
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+ print "/* Generated automatically by \"genstr\" from \"isa-evolution.in\"."
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+ print " Please do not edit this file directly."
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+ print ""
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+
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+ copyright_header(2023, 2024)
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+
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+ print "*/"
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+ print ""
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+ print "#include \"config.h\""
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+ print "#include \"system.h\""
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+ print "#include \"coretypes.h\""
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+ print "#include \"options.h\""
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+ print ""
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+ print "#include \"loongarch-evolution.h\""
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+ print ""
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+
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+ print "int la_evo_feature_masks[] = {";
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+ for (i = 1; i <= NR; i++)
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+ print " OPTION_MASK_ISA_" name_capitalized[i] ","
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+ print "};"
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+ print ""
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+
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+ print "const char* la_evo_macro_name[] = {";
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+ for (i = 1; i <= NR; i++)
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+ print " \"__loongarch_" name[i] "\","
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+ print "};"
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+ print ""
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+
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+
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+ print "int la_evo_version_major[] = {"
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+ for (i = 1; i <= NR; i++)
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+ print " " isa_version_major[i] ", /* " name_capitalized[i] " */"
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+ print "};"
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+ print ""
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+
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+ print "int la_evo_version_minor[] = {"
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+ for (i = 1; i <= NR; i++)
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+ print " " isa_version_minor[i] ", /* " name_capitalized[i] " */"
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+ print "};"
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+}
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+
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+END {
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+ if (header_p)
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+ gen_full_header()
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+ else
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+ gen_full_source()
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+}
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diff --git a/gcc/config/loongarch/genopts/genstr.sh b/gcc/config/loongarch/genopts/genstr.sh
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index 391eca121..3e86c8152 100755
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--- a/gcc/config/loongarch/genopts/genstr.sh
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+++ b/gcc/config/loongarch/genopts/genstr.sh
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@@ -108,78 +108,30 @@ EOF
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print("m"$3)
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gsub(/-/, "_", $3)
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print("Target Mask(ISA_"toupper($3)") Var(la_isa_evolution)")
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- $1=""; $2=""; $3=""
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+ $1=""; $2=""; $3=""; $4=""
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sub(/^ */, "", $0)
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print($0)
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}' isa-evolution.in
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}
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-gen_cpucfg_map() {
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- cat <<EOF
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-/* Generated automatically by "genstr" from "isa-evolution.in".
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- Please do not edit this file directly.
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-
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- Copyright (C) 2023 Free Software Foundation, Inc.
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-
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-This file is part of GCC.
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-
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-GCC is free software; you can redistribute it and/or modify
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-it under the terms of the GNU General Public License as published by
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-the Free Software Foundation; either version 3, or (at your option)
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-any later version.
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-
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-GCC is distributed in the hope that it will be useful,
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-but WITHOUT ANY WARRANTY; without even the implied warranty of
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-MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
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-GNU General Public License for more details.
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-
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-You should have received a copy of the GNU General Public License
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-along with GCC; see the file COPYING3. If not see
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-<http://www.gnu.org/licenses/>. */
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-
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-#ifndef LOONGARCH_CPUCFG_MAP_H
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-#define LOONGARCH_CPUCFG_MAP_H
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-
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-#include "options.h"
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-
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-static constexpr struct {
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- int cpucfg_word;
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- unsigned int cpucfg_bit;
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- HOST_WIDE_INT isa_evolution_bit;
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-} cpucfg_map[] = {
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-EOF
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-
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- # Generate the strings from isa-evolution.in.
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- awk '{
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- gsub(/-/, "_", $3)
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- print(" { "$1", 1u << "$2", OPTION_MASK_ISA_"toupper($3)" },")
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- }' isa-evolution.in
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-
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- echo "};"
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- echo
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- echo "static constexpr int cpucfg_useful_idx[] = {"
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-
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- awk 'BEGIN { print(" 0,\n 1,\n 2,\n 16,\n 17,\n 18,\n 19,") }
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- {if ($1+0 > max+0) max=$1; print(" "$1",")}' \
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- isa-evolution.in | sort -n | uniq
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-
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- echo "};"
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- echo ""
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-
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- awk 'BEGIN { max=19 }
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- { if ($1+0 > max+0) max=$1 }
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- END { print "static constexpr int N_CPUCFG_WORDS = "1+max";" }' \
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- isa-evolution.in
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-
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- echo "#endif /* LOONGARCH_CPUCFG_MAP_H */"
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-}
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-
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main() {
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case "$1" in
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- cpucfg-map) gen_cpucfg_map;;
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- header) gen_defines;;
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- opt) gen_options;;
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- *) echo "Unknown Command: \"$1\". Available: cpucfg-map, header, opt"; exit 1;;
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+ evolution_h)
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+ awk -v header_p=1 -f gen-evolution.awk isa-evolution.in
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+ ;;
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+ evolution_c)
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+ awk -v header_p=0 -f gen-evolution.awk isa-evolution.in
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+ ;;
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+ header)
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+ gen_defines
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+ ;;
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+ opt)
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+ gen_options
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+ ;;
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+ *)
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+ echo "Unknown Command: \"$1\". Available: header, opt, evolution_h, evolution_c"
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+ exit 1
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+ ;;
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esac
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}
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diff --git a/gcc/config/loongarch/genopts/isa-evolution.in b/gcc/config/loongarch/genopts/isa-evolution.in
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index 11a198b64..50f72d5a0 100644
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--- a/gcc/config/loongarch/genopts/isa-evolution.in
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+++ b/gcc/config/loongarch/genopts/isa-evolution.in
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@@ -1,5 +1,5 @@
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-2 25 frecipe Support frecipe.{s/d} and frsqrte.{s/d} instructions.
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-2 26 div32 Support div.w[u] and mod.w[u] instructions with inputs not sign-extended.
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-2 27 lam-bh Support am{swap/add}[_db].{b/h} instructions.
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-2 28 lamcas Support amcas[_db].{b/h/w/d} instructions.
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-3 23 ld-seq-sa Do not need load-load barriers (dbar 0x700).
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+2 25 frecipe 1.1 Support frecipe.{s/d} and frsqrte.{s/d} instructions.
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+2 26 div32 1.1 Support div.w[u] and mod.w[u] instructions with inputs not sign-extended.
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+2 27 lam-bh 1.1 Support am{swap/add}[_db].{b/h} instructions.
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+2 28 lamcas 1.1 Support amcas[_db].{b/h/w/d} instructions.
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+3 23 ld-seq-sa 1.1 Do not need load-load barriers (dbar 0x700).
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diff --git a/gcc/config/loongarch/loongarch-c.cc b/gcc/config/loongarch/loongarch-c.cc
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index 153db75b0..4ecea6a45 100644
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--- a/gcc/config/loongarch/loongarch-c.cc
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+++ b/gcc/config/loongarch/loongarch-c.cc
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@@ -103,6 +103,29 @@ loongarch_cpu_cpp_builtins (cpp_reader *pfile)
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builtin_define ("__loongarch_simd_width=256");
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}
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+ /* ISA evolution features */
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+ int max_v_major = 1, max_v_minor = 0;
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+
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+ for (int i = 0; i < N_EVO_FEATURES; i++)
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+ if (la_target.isa.evolution & la_evo_feature_masks[i])
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+ {
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+ builtin_define (la_evo_macro_name[i]);
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+
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+ int major = la_evo_version_major[i],
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+ minor = la_evo_version_minor[i];
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+
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+ max_v_major = major > max_v_major ? major : max_v_major;
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+ max_v_minor = major == max_v_major
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+ ? (minor > max_v_minor ? minor : max_v_minor): max_v_minor;
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+ }
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+
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+ /* Find the minimum ISA version required to run the target program. */
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+ if (!(max_v_major == 1 && max_v_minor <= 1 && ISA_HAS_LASX))
|
|
+ {
|
|
+ builtin_define_with_int_value ("__loongarch_version_major", max_v_major);
|
|
+ builtin_define_with_int_value ("__loongarch_version_minor", max_v_minor);
|
|
+ }
|
|
+
|
|
/* Native Data Sizes. */
|
|
builtin_define_with_int_value ("_LOONGARCH_SZINT", INT_TYPE_SIZE);
|
|
builtin_define_with_int_value ("_LOONGARCH_SZLONG", LONG_TYPE_SIZE);
|
|
diff --git a/gcc/config/loongarch/loongarch-cpu.cc b/gcc/config/loongarch/loongarch-cpu.cc
|
|
index eb1eb8011..49107f2ae 100644
|
|
--- a/gcc/config/loongarch/loongarch-cpu.cc
|
|
+++ b/gcc/config/loongarch/loongarch-cpu.cc
|
|
@@ -28,8 +28,8 @@ along with GCC; see the file COPYING3. If not see
|
|
#include "loongarch-def.h"
|
|
#include "loongarch-opts.h"
|
|
#include "loongarch-cpu.h"
|
|
-#include "loongarch-cpucfg-map.h"
|
|
#include "loongarch-str.h"
|
|
+#include "loongarch-evolution.h"
|
|
|
|
|
|
/* Native CPU detection with "cpucfg" */
|
|
diff --git a/gcc/config/loongarch/loongarch-evolution.cc b/gcc/config/loongarch/loongarch-evolution.cc
|
|
new file mode 100644
|
|
index 000000000..1fb4e3b01
|
|
--- /dev/null
|
|
+++ b/gcc/config/loongarch/loongarch-evolution.cc
|
|
@@ -0,0 +1,60 @@
|
|
+/* Generated automatically by "genstr" from "isa-evolution.in".
|
|
+ Please do not edit this file directly.
|
|
+
|
|
+ Copyright (C) 2023-2024 Free Software Foundation, Inc.
|
|
+
|
|
+This file is part of GCC.
|
|
+
|
|
+GCC is free software; you can redistribute it and/or modify
|
|
+it under the terms of the GNU General Public License as published by
|
|
+the Free Software Foundation; either version 3, or (at your option)
|
|
+any later version.
|
|
+
|
|
+GCC is distributed in the hope that it will be useful,
|
|
+but WITHOUT ANY WARRANTY; without even the implied warranty of
|
|
+MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
|
|
+GNU General Public License for more details.
|
|
+
|
|
+You should have received a copy of the GNU General Public License
|
|
+along with GCC; see the file COPYING3. If not see
|
|
+<http://www.gnu.org/licenses/>.
|
|
+*/
|
|
+
|
|
+#include "config.h"
|
|
+#include "system.h"
|
|
+#include "coretypes.h"
|
|
+#include "options.h"
|
|
+
|
|
+#include "loongarch-evolution.h"
|
|
+
|
|
+int la_evo_feature_masks[] = {
|
|
+ OPTION_MASK_ISA_FRECIPE,
|
|
+ OPTION_MASK_ISA_DIV32,
|
|
+ OPTION_MASK_ISA_LAM_BH,
|
|
+ OPTION_MASK_ISA_LAMCAS,
|
|
+ OPTION_MASK_ISA_LD_SEQ_SA,
|
|
+};
|
|
+
|
|
+const char* la_evo_macro_name[] = {
|
|
+ "__loongarch_frecipe",
|
|
+ "__loongarch_div32",
|
|
+ "__loongarch_lam_bh",
|
|
+ "__loongarch_lamcas",
|
|
+ "__loongarch_ld_seq_sa",
|
|
+};
|
|
+
|
|
+int la_evo_version_major[] = {
|
|
+ 1, /* FRECIPE */
|
|
+ 1, /* DIV32 */
|
|
+ 1, /* LAM_BH */
|
|
+ 1, /* LAMCAS */
|
|
+ 1, /* LD_SEQ_SA */
|
|
+};
|
|
+
|
|
+int la_evo_version_minor[] = {
|
|
+ 1, /* FRECIPE */
|
|
+ 1, /* DIV32 */
|
|
+ 1, /* LAM_BH */
|
|
+ 1, /* LAMCAS */
|
|
+ 1, /* LD_SEQ_SA */
|
|
+};
|
|
diff --git a/gcc/config/loongarch/loongarch-cpucfg-map.h b/gcc/config/loongarch/loongarch-evolution.h
|
|
similarity index 52%
|
|
rename from gcc/config/loongarch/loongarch-cpucfg-map.h
|
|
rename to gcc/config/loongarch/loongarch-evolution.h
|
|
index 148333c24..d64996481 100644
|
|
--- a/gcc/config/loongarch/loongarch-cpucfg-map.h
|
|
+++ b/gcc/config/loongarch/loongarch-evolution.h
|
|
@@ -17,10 +17,13 @@ GNU General Public License for more details.
|
|
|
|
You should have received a copy of the GNU General Public License
|
|
along with GCC; see the file COPYING3. If not see
|
|
-<http://www.gnu.org/licenses/>. */
|
|
+<http://www.gnu.org/licenses/>.
|
|
+*/
|
|
|
|
-#ifndef LOONGARCH_CPUCFG_MAP_H
|
|
-#define LOONGARCH_CPUCFG_MAP_H
|
|
+#ifndef LOONGARCH_EVOLUTION_H
|
|
+#define LOONGARCH_EVOLUTION_H
|
|
+
|
|
+#if !defined(IN_LIBGCC2) && !defined(IN_TARGET_LIBS) && !defined(IN_RTS)
|
|
|
|
#include "options.h"
|
|
|
|
@@ -48,4 +51,39 @@ static constexpr int cpucfg_useful_idx[] = {
|
|
};
|
|
|
|
static constexpr int N_CPUCFG_WORDS = 20;
|
|
-#endif /* LOONGARCH_CPUCFG_MAP_H */
|
|
+
|
|
+/* ISA evolution features */
|
|
+enum {
|
|
+ EVO_FRECIPE = 0,
|
|
+ EVO_DIV32 = 1,
|
|
+ EVO_LAM_BH = 2,
|
|
+ EVO_LAMCAS = 3,
|
|
+ EVO_LD_SEQ_SA = 4,
|
|
+ N_EVO_FEATURES = 5
|
|
+};
|
|
+
|
|
+/* Condition macros */
|
|
+#define ISA_HAS_FRECIPE \
|
|
+ (la_target.isa.evolution & OPTION_MASK_ISA_FRECIPE)
|
|
+#define ISA_HAS_DIV32 \
|
|
+ (la_target.isa.evolution & OPTION_MASK_ISA_DIV32)
|
|
+#define ISA_HAS_LAM_BH \
|
|
+ (la_target.isa.evolution & OPTION_MASK_ISA_LAM_BH)
|
|
+#define ISA_HAS_LAMCAS \
|
|
+ (la_target.isa.evolution & OPTION_MASK_ISA_LAMCAS)
|
|
+#define ISA_HAS_LD_SEQ_SA \
|
|
+ (la_target.isa.evolution & OPTION_MASK_ISA_LD_SEQ_SA)
|
|
+
|
|
+/* Bitmasks on la_target.isa.evolution. */
|
|
+extern int la_evo_feature_masks[N_EVO_FEATURES];
|
|
+
|
|
+/* Builtin macro names for the evolution features. */
|
|
+extern const char* la_evo_macro_name[N_EVO_FEATURES];
|
|
+
|
|
+/* The ISA version where a specific feature is introduced. */
|
|
+extern int la_evo_version_major[N_EVO_FEATURES];
|
|
+extern int la_evo_version_minor[N_EVO_FEATURES];
|
|
+
|
|
+#endif
|
|
+
|
|
+#endif /* LOONGARCH_EVOLUTION_H */
|
|
diff --git a/gcc/config/loongarch/loongarch-opts.h b/gcc/config/loongarch/loongarch-opts.h
|
|
index 325c1e29c..19bae5a0b 100644
|
|
--- a/gcc/config/loongarch/loongarch-opts.h
|
|
+++ b/gcc/config/loongarch/loongarch-opts.h
|
|
@@ -115,17 +115,6 @@ struct loongarch_flags {
|
|
#define ISA_HAS_LASX \
|
|
(la_target.isa.simd == ISA_EXT_SIMD_LASX)
|
|
|
|
-#define ISA_HAS_FRECIPE \
|
|
- (la_target.isa.evolution & OPTION_MASK_ISA_FRECIPE)
|
|
-#define ISA_HAS_DIV32 \
|
|
- (la_target.isa.evolution & OPTION_MASK_ISA_DIV32)
|
|
-#define ISA_HAS_LAM_BH \
|
|
- (la_target.isa.evolution & OPTION_MASK_ISA_LAM_BH)
|
|
-#define ISA_HAS_LAMCAS \
|
|
- (la_target.isa.evolution & OPTION_MASK_ISA_LAMCAS)
|
|
-#define ISA_HAS_LD_SEQ_SA \
|
|
- (la_target.isa.evolution & OPTION_MASK_ISA_LD_SEQ_SA)
|
|
-
|
|
/* TARGET_ macros for use in *.md template conditionals */
|
|
#define TARGET_uARCH_LA464 (la_target.cpu_tune == TUNE_LA464)
|
|
#define TARGET_uARCH_LA664 (la_target.cpu_tune == TUNE_LA664)
|
|
diff --git a/gcc/config/loongarch/loongarch.h b/gcc/config/loongarch/loongarch.h
|
|
index 089206605..6743d2684 100644
|
|
--- a/gcc/config/loongarch/loongarch.h
|
|
+++ b/gcc/config/loongarch/loongarch.h
|
|
@@ -22,6 +22,7 @@ along with GCC; see the file COPYING3. If not see
|
|
/* LoongArch external variables defined in loongarch.cc. */
|
|
|
|
#include "config/loongarch/loongarch-opts.h"
|
|
+#include "config/loongarch/loongarch-evolution.h"
|
|
|
|
#define SWITCHABLE_TARGET 1
|
|
|
|
diff --git a/gcc/config/loongarch/t-loongarch b/gcc/config/loongarch/t-loongarch
|
|
index 488e8cff3..53dde9ce6 100644
|
|
--- a/gcc/config/loongarch/t-loongarch
|
|
+++ b/gcc/config/loongarch/t-loongarch
|
|
@@ -21,7 +21,7 @@ GTM_H += loongarch-multilib.h
|
|
OPTIONS_H_EXTRA += $(srcdir)/config/loongarch/loongarch-def.h \
|
|
$(srcdir)/config/loongarch/loongarch-def-array.h \
|
|
$(srcdir)/config/loongarch/loongarch-tune.h \
|
|
- $(srcdir)/config/loongarch/loongarch-cpucfg-map.h
|
|
+ $(srcdir)/config/loongarch/loongarch-evolution.h
|
|
|
|
# Canonical target triplet from config.gcc
|
|
LA_MULTIARCH_TRIPLET = $(patsubst LA_MULTIARCH_TRIPLET=%,%,$\
|
|
@@ -62,7 +62,11 @@ loongarch-opts.o: $(srcdir)/config/loongarch/loongarch-opts.cc $(LA_STR_H)
|
|
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
|
|
|
|
loongarch-cpu.o: $(srcdir)/config/loongarch/loongarch-cpu.cc $(LA_STR_H) \
|
|
- $(srcdir)/config/loongarch/loongarch-cpucfg-map.h
|
|
+ $(srcdir)/config/loongarch/loongarch-evolution.h
|
|
+ $(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
|
|
+
|
|
+loongarch-evolution.o: $(srcdir)/config/loongarch/loongarch-evolution.cc $(LA_STR_H) \
|
|
+ $(srcdir)/config/loongarch/loongarch-evolution.h
|
|
$(COMPILER) -c $(ALL_COMPILERFLAGS) $(ALL_CPPFLAGS) $(INCLUDES) $<
|
|
|
|
loongarch-def.o: $(srcdir)/config/loongarch/loongarch-def.cc $(LA_STR_H)
|
|
@@ -84,11 +88,17 @@ s-loongarch-opt: $(srcdir)/config/loongarch/genopts/genstr.sh \
|
|
$(srcdir)/config/loongarch/loongarch.opt
|
|
$(STAMP) s-loongarch-opt
|
|
|
|
-$(srcdir)/config/loongarch/loongarch-cpucfg-map.h: s-loongarch-cpucfg-map
|
|
+$(srcdir)/config/loongarch/loongarch-evolution.h: s-loongarch-evolution
|
|
@true
|
|
-s-loongarch-cpucfg-map: $(srcdir)/config/loongarch/genopts/genstr.sh \
|
|
- $(srcdir)/config/loongarch/genopts/isa-evolution.in
|
|
- $(SHELL) $< cpucfg-map > tmp-cpucfg.h
|
|
- $(SHELL) $(srcdir)/../move-if-change tmp-cpucfg.h \
|
|
- $(srcdir)/config/loongarch/loongarch-cpucfg-map.h
|
|
+$(srcdir)/config/loongarch/loongarch-evolution.cc: s-loongarch-evolution
|
|
+ @true
|
|
+s-loongarch-evolution: $(srcdir)/config/loongarch/genopts/genstr.sh \
|
|
+ $(srcdir)/config/loongarch/genopts/isa-evolution.in \
|
|
+ $(srcdir)/config/loongarch/genopts/gen-evolution.awk
|
|
+ $(SHELL) $< evolution_h > tmp-isa-evo.h
|
|
+ $(SHELL) $< evolution_c > tmp-isa-evo.cc
|
|
+ $(SHELL) $(srcdir)/../move-if-change tmp-isa-evo.h \
|
|
+ $(srcdir)/config/loongarch/loongarch-evolution.h
|
|
+ $(SHELL) $(srcdir)/../move-if-change tmp-isa-evo.cc \
|
|
+ $(srcdir)/config/loongarch/loongarch-evolution.cc
|
|
$(STAMP) $@
|
|
--
|
|
2.43.0
|
|
|