413 lines
13 KiB
Diff
413 lines
13 KiB
Diff
From dac02bbb72cae374ddc905fffcc6c94c901f9b26 Mon Sep 17 00:00:00 2001
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From: Jiahao Xu <xujiahao@loongson.cn>
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Date: Fri, 17 Nov 2023 17:00:21 +0800
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Subject: [PATCH 058/188] LoongArch: Add support for xorsign.
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This patch adds support for xorsign pattern to scalar fp and vector. With the
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new expands, uniformly using vector bitwise logical operations to handle xorsign.
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On LoongArch64, floating-point registers and vector registers share the same register,
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so this patch also allows conversion between LSX vector mode and scalar fp mode to
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avoid unnecessary instruction generation.
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gcc/ChangeLog:
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* config/loongarch/lasx.md (xorsign<mode>3): New expander.
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* config/loongarch/loongarch.cc (loongarch_can_change_mode_class): Allow
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conversion between LSX vector mode and scalar fp mode.
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* config/loongarch/loongarch.md (@xorsign<mode>3): New expander.
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* config/loongarch/lsx.md (@xorsign<mode>3): Ditto.
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gcc/testsuite/ChangeLog:
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* gcc.target/loongarch/vector/lasx/lasx-xorsign-run.c: New test.
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* gcc.target/loongarch/vector/lasx/lasx-xorsign.c: New test.
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* gcc.target/loongarch/vector/lsx/lsx-xorsign-run.c: New test.
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* gcc.target/loongarch/vector/lsx/lsx-xorsign.c: New test.
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* gcc.target/loongarch/xorsign-run.c: New test.
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* gcc.target/loongarch/xorsign.c: New test.
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---
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gcc/config/loongarch/lasx.md | 22 +++++--
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gcc/config/loongarch/loongarch.cc | 5 ++
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gcc/config/loongarch/loongarch.md | 17 ++++++
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gcc/config/loongarch/lsx.md | 23 +++++--
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.../loongarch/vector/lasx/lasx-xorsign-run.c | 60 +++++++++++++++++++
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.../loongarch/vector/lasx/lasx-xorsign.c | 19 ++++++
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.../loongarch/vector/lsx/lsx-xorsign-run.c | 60 +++++++++++++++++++
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.../loongarch/vector/lsx/lsx-xorsign.c | 19 ++++++
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.../gcc.target/loongarch/xorsign-run.c | 25 ++++++++
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gcc/testsuite/gcc.target/loongarch/xorsign.c | 18 ++++++
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10 files changed, 260 insertions(+), 8 deletions(-)
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create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign-run.c
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create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign.c
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create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign-run.c
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create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign.c
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create mode 100644 gcc/testsuite/gcc.target/loongarch/xorsign-run.c
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create mode 100644 gcc/testsuite/gcc.target/loongarch/xorsign.c
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diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
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index 116b30c07..de7c88f14 100644
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--- a/gcc/config/loongarch/lasx.md
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+++ b/gcc/config/loongarch/lasx.md
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@@ -1065,10 +1065,10 @@
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(set_attr "mode" "<MODE>")])
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(define_insn "xor<mode>3"
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- [(set (match_operand:ILASX 0 "register_operand" "=f,f,f")
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- (xor:ILASX
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- (match_operand:ILASX 1 "register_operand" "f,f,f")
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- (match_operand:ILASX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
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+ [(set (match_operand:LASX 0 "register_operand" "=f,f,f")
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+ (xor:LASX
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+ (match_operand:LASX 1 "register_operand" "f,f,f")
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+ (match_operand:LASX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
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"ISA_HAS_LASX"
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"@
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xvxor.v\t%u0,%u1,%u2
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@@ -3061,6 +3061,20 @@
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operands[5] = gen_reg_rtx (<MODE>mode);
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})
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+(define_expand "xorsign<mode>3"
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+ [(set (match_dup 4)
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+ (and:FLASX (match_dup 3)
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+ (match_operand:FLASX 2 "register_operand")))
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+ (set (match_operand:FLASX 0 "register_operand")
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+ (xor:FLASX (match_dup 4)
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+ (match_operand:FLASX 1 "register_operand")))]
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+ "ISA_HAS_LASX"
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+{
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+ operands[3] = loongarch_build_signbit_mask (<MODE>mode, 1, 0);
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+
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+ operands[4] = gen_reg_rtx (<MODE>mode);
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+})
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+
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(define_insn "absv4df2"
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[(set (match_operand:V4DF 0 "register_operand" "=f")
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diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
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index 3ef7e3605..3c8ae9a42 100644
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--- a/gcc/config/loongarch/loongarch.cc
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+++ b/gcc/config/loongarch/loongarch.cc
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@@ -6703,6 +6703,11 @@ loongarch_can_change_mode_class (machine_mode from, machine_mode to,
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if (LSX_SUPPORTED_MODE_P (from) && LSX_SUPPORTED_MODE_P (to))
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return true;
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+ /* Allow conversion between LSX vector mode and scalar fp mode. */
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+ if ((LSX_SUPPORTED_MODE_P (from) && SCALAR_FLOAT_MODE_P (to))
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+ || ((SCALAR_FLOAT_MODE_P (from) && LSX_SUPPORTED_MODE_P (to))))
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+ return true;
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+
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return !reg_classes_intersect_p (FP_REGS, rclass);
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}
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diff --git a/gcc/config/loongarch/loongarch.md b/gcc/config/loongarch/loongarch.md
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index cfd7a8ec6..afc3c591f 100644
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--- a/gcc/config/loongarch/loongarch.md
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+++ b/gcc/config/loongarch/loongarch.md
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@@ -1164,6 +1164,23 @@
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"fcopysign.<fmt>\t%0,%1,%2"
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[(set_attr "type" "fcopysign")
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(set_attr "mode" "<UNITMODE>")])
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+
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+(define_expand "@xorsign<mode>3"
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+ [(match_operand:ANYF 0 "register_operand")
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+ (match_operand:ANYF 1 "register_operand")
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+ (match_operand:ANYF 2 "register_operand")]
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+ "ISA_HAS_LSX"
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+{
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+ machine_mode lsx_mode
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+ = <MODE>mode == SFmode ? V4SFmode : V2DFmode;
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+ rtx tmp = gen_reg_rtx (lsx_mode);
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+ rtx op1 = lowpart_subreg (lsx_mode, operands[1], <MODE>mode);
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+ rtx op2 = lowpart_subreg (lsx_mode, operands[2], <MODE>mode);
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+ emit_insn (gen_xorsign3 (lsx_mode, tmp, op1, op2));
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+ emit_move_insn (operands[0],
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+ lowpart_subreg (<MODE>mode, tmp, lsx_mode));
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+ DONE;
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+})
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;;
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;; ....................
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diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md
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index 232399934..ce6ec6d69 100644
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--- a/gcc/config/loongarch/lsx.md
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+++ b/gcc/config/loongarch/lsx.md
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@@ -957,10 +957,10 @@
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(set_attr "mode" "<MODE>")])
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(define_insn "xor<mode>3"
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- [(set (match_operand:ILSX 0 "register_operand" "=f,f,f")
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- (xor:ILSX
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- (match_operand:ILSX 1 "register_operand" "f,f,f")
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- (match_operand:ILSX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
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+ [(set (match_operand:LSX 0 "register_operand" "=f,f,f")
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+ (xor:LSX
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+ (match_operand:LSX 1 "register_operand" "f,f,f")
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+ (match_operand:LSX 2 "reg_or_vector_same_val_operand" "f,YC,Urv8")))]
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"ISA_HAS_LSX"
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"@
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vxor.v\t%w0,%w1,%w2
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@@ -2786,6 +2786,21 @@
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operands[5] = gen_reg_rtx (<MODE>mode);
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})
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+(define_expand "@xorsign<mode>3"
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+ [(set (match_dup 4)
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+ (and:FLSX (match_dup 3)
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+ (match_operand:FLSX 2 "register_operand")))
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+ (set (match_operand:FLSX 0 "register_operand")
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+ (xor:FLSX (match_dup 4)
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+ (match_operand:FLSX 1 "register_operand")))]
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+ "ISA_HAS_LSX"
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+{
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+ operands[3] = loongarch_build_signbit_mask (<MODE>mode, 1, 0);
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+
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+ operands[4] = gen_reg_rtx (<MODE>mode);
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+})
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+
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+
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(define_insn "absv2df2"
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[(set (match_operand:V2DF 0 "register_operand" "=f")
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(abs:V2DF (match_operand:V2DF 1 "register_operand" "f")))]
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diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign-run.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign-run.c
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new file mode 100644
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index 000000000..2295503d4
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign-run.c
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@@ -0,0 +1,60 @@
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+/* { dg-do run } */
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+/* { dg-options "-O2 -ftree-vectorize -mlasx" } */
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+/* { dg-require-effective-target loongarch_asx_hw } */
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+
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+#include "lasx-xorsign.c"
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+
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+extern void abort ();
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+
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+#define N 16
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+float a[N] = {-0.1f, -3.2f, -6.3f, -9.4f,
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+ -12.5f, -15.6f, -18.7f, -21.8f,
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+ 24.9f, 27.1f, 30.2f, 33.3f,
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+ 36.4f, 39.5f, 42.6f, 45.7f};
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+float b[N] = {-1.2f, 3.4f, -5.6f, 7.8f,
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+ -9.0f, 1.0f, -2.0f, 3.0f,
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+ -4.0f, -5.0f, 6.0f, 7.0f,
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+ -8.0f, -9.0f, 10.0f, 11.0f};
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+float r[N];
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+
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+double ad[N] = {-0.1d, -3.2d, -6.3d, -9.4d,
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+ -12.5d, -15.6d, -18.7d, -21.8d,
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+ 24.9d, 27.1d, 30.2d, 33.3d,
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+ 36.4d, 39.5d, 42.6d, 45.7d};
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+double bd[N] = {-1.2d, 3.4d, -5.6d, 7.8d,
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+ -9.0d, 1.0d, -2.0d, 3.0d,
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+ -4.0d, -5.0d, 6.0d, 7.0d,
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+ -8.0d, -9.0d, 10.0d, 11.0d};
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+double rd[N];
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+
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+void
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+__attribute__ ((optimize ("-O0")))
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+check_xorsignf (void)
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+{
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+ for (int i = 0; i < N; i++)
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+ if (r[i] != a[i] * __builtin_copysignf (1.0f, b[i]))
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+ abort ();
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+}
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+
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+void
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+__attribute__ ((optimize ("-O0")))
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+check_xorsign (void)
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+{
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+ for (int i = 0; i < N; i++)
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+ if (rd[i] != ad[i] * __builtin_copysign (1.0d, bd[i]))
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+ abort ();
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+}
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+
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+int
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+main (void)
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+{
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+ my_xorsignf (r, a, b, N);
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+ /* check results: */
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+ check_xorsignf ();
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+
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+ my_xorsign (rd, ad, bd, N);
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+ /* check results: */
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+ check_xorsign ();
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+
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+ return 0;
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+}
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diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign.c b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign.c
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new file mode 100644
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index 000000000..190a9239b
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/vector/lasx/lasx-xorsign.c
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@@ -0,0 +1,19 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -ftree-vectorize -mlasx" } */
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+/* { dg-final { scan-assembler "xvand\\.v" } } */
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+/* { dg-final { scan-assembler "xvxor\\.v" } } */
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+/* { dg-final { scan-assembler-not "xvfmul" } } */
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+
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+double
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+my_xorsign (double *restrict a, double *restrict b, double *restrict c, int n)
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+{
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+ for (int i = 0; i < n; i++)
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+ a[i] = b[i] * __builtin_copysign (1.0d, c[i]);
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+}
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+
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+float
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+my_xorsignf (float *restrict a, float *restrict b, float *restrict c, int n)
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+{
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+ for (int i = 0; i < n; i++)
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+ a[i] = b[i] * __builtin_copysignf (1.0f, c[i]);
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+}
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diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign-run.c b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign-run.c
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new file mode 100644
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index 000000000..22c5c03cc
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign-run.c
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@@ -0,0 +1,60 @@
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+/* { dg-do run } */
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+/* { dg-options "-O2 -ftree-vectorize -mlsx" } */
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+/* { dg-require-effective-target loongarch_sx_hw } */
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+
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+#include "lsx-xorsign.c"
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+
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+extern void abort ();
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+
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+#define N 16
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+float a[N] = {-0.1f, -3.2f, -6.3f, -9.4f,
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+ -12.5f, -15.6f, -18.7f, -21.8f,
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+ 24.9f, 27.1f, 30.2f, 33.3f,
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+ 36.4f, 39.5f, 42.6f, 45.7f};
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+float b[N] = {-1.2f, 3.4f, -5.6f, 7.8f,
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+ -9.0f, 1.0f, -2.0f, 3.0f,
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+ -4.0f, -5.0f, 6.0f, 7.0f,
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+ -8.0f, -9.0f, 10.0f, 11.0f};
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+float r[N];
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+
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+double ad[N] = {-0.1d, -3.2d, -6.3d, -9.4d,
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+ -12.5d, -15.6d, -18.7d, -21.8d,
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+ 24.9d, 27.1d, 30.2d, 33.3d,
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+ 36.4d, 39.5d, 42.6d, 45.7d};
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+double bd[N] = {-1.2d, 3.4d, -5.6d, 7.8d,
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+ -9.0d, 1.0d, -2.0d, 3.0d,
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+ -4.0d, -5.0d, 6.0d, 7.0d,
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+ -8.0d, -9.0d, 10.0d, 11.0d};
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+double rd[N];
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+
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+void
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+__attribute__ ((optimize ("-O0")))
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+check_xorsignf (void)
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+{
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+ for (int i = 0; i < N; i++)
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+ if (r[i] != a[i] * __builtin_copysignf (1.0f, b[i]))
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+ abort ();
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+}
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+
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+void
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+__attribute__ ((optimize ("-O0")))
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+check_xorsign (void)
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+{
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+ for (int i = 0; i < N; i++)
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+ if (rd[i] != ad[i] * __builtin_copysign (1.0d, bd[i]))
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+ abort ();
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+}
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+
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+int
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+main (void)
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+{
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+ my_xorsignf (r, a, b, N);
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+ /* check results: */
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+ check_xorsignf ();
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+
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+ my_xorsign (rd, ad, bd, N);
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+ /* check results: */
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+ check_xorsign ();
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+
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+ return 0;
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+}
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diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign.c b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign.c
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new file mode 100644
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index 000000000..c2694c11e
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-xorsign.c
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@@ -0,0 +1,19 @@
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+/* { dg-do compile } */
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+/* { dg-options "-O2 -ftree-vectorize -mlsx" } */
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+/* { dg-final { scan-assembler "vand\\.v" } } */
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+/* { dg-final { scan-assembler "vxor\\.v" } } */
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+/* { dg-final { scan-assembler-not "vfmul" } } */
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+
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+double
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+my_xorsign (double *restrict a, double *restrict b, double *restrict c, int n)
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+{
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+ for (int i = 0; i < n; i++)
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+ a[i] = b[i] * __builtin_copysign (1.0d, c[i]);
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+}
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+
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+float
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+my_xorsignf (float *restrict a, float *restrict b, float *restrict c, int n)
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+{
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+ for (int i = 0; i < n; i++)
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+ a[i] = b[i] * __builtin_copysignf (1.0f, c[i]);
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+}
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diff --git a/gcc/testsuite/gcc.target/loongarch/xorsign-run.c b/gcc/testsuite/gcc.target/loongarch/xorsign-run.c
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new file mode 100644
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index 000000000..b4f28adf8
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/xorsign-run.c
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@@ -0,0 +1,25 @@
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+/* { dg-do run } */
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+/* { dg-options "-O2 -mlsx" } */
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+/* { dg-require-effective-target loongarch_sx_hw } */
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+
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+extern void abort(void);
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+
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+static double x = 2.0;
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+static float y = 2.0;
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+
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+int main()
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+{
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+ if ((2.5 * __builtin_copysign(1.0d, x)) != 2.5)
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+ abort();
|
||
+
|
||
+ if ((2.5 * __builtin_copysign(1.0f, y)) != 2.5)
|
||
+ abort();
|
||
+
|
||
+ if ((2.5 * __builtin_copysignf(1.0d, -x)) != -2.5)
|
||
+ abort();
|
||
+
|
||
+ if ((2.5 * __builtin_copysignf(1.0f, -y)) != -2.5)
|
||
+ abort();
|
||
+
|
||
+ return 0;
|
||
+}
|
||
diff --git a/gcc/testsuite/gcc.target/loongarch/xorsign.c b/gcc/testsuite/gcc.target/loongarch/xorsign.c
|
||
new file mode 100644
|
||
index 000000000..ca80603d4
|
||
--- /dev/null
|
||
+++ b/gcc/testsuite/gcc.target/loongarch/xorsign.c
|
||
@@ -0,0 +1,18 @@
|
||
+/* { dg-do compile } */
|
||
+/* { dg-options "-O2 -mlsx" } */
|
||
+/* { dg-final { scan-assembler "vand\\.v" } } */
|
||
+/* { dg-final { scan-assembler "vxor\\.v" } } */
|
||
+/* { dg-final { scan-assembler-not "fcopysign" } } */
|
||
+/* { dg-final { scan-assembler-not "fmul" } } */
|
||
+
|
||
+double
|
||
+my_xorsign (double a, double b)
|
||
+{
|
||
+ return a * __builtin_copysign (1.0d, b);
|
||
+}
|
||
+
|
||
+float
|
||
+my_xorsignf (float a, float b)
|
||
+{
|
||
+ return a * __builtin_copysignf (1.0f, b);
|
||
+}
|
||
--
|
||
2.43.0
|
||
|