233 lines
7.4 KiB
Diff
233 lines
7.4 KiB
Diff
From 1096571509762846e2222f575bc981385b4e9fb7 Mon Sep 17 00:00:00 2001
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From: Chenghui Pan <panchenghui@loongson.cn>
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Date: Fri, 22 Dec 2023 16:18:44 +0800
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Subject: [PATCH 087/188] LoongArch: Fix ICE when passing two same vector
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argument consecutively
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Following code will cause ICE on LoongArch target:
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#include <lsxintrin.h>
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extern void bar (__m128i, __m128i);
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__m128i a;
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void
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foo ()
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{
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bar (a, a);
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}
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It is caused by missing constraint definition in mov<mode>_lsx. This
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patch fixes the template and remove the unnecessary processing from
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loongarch_split_move () function.
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This patch also cleanup the redundant definition from
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loongarch_split_move () and loongarch_split_move_p ().
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gcc/ChangeLog:
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* config/loongarch/lasx.md: Use loongarch_split_move and
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loongarch_split_move_p directly.
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* config/loongarch/loongarch-protos.h
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(loongarch_split_move): Remove unnecessary argument.
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(loongarch_split_move_insn_p): Delete.
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(loongarch_split_move_insn): Delete.
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* config/loongarch/loongarch.cc
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(loongarch_split_move_insn_p): Delete.
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(loongarch_load_store_insns): Use loongarch_split_move_p
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directly.
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(loongarch_split_move): remove the unnecessary processing.
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(loongarch_split_move_insn): Delete.
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* config/loongarch/lsx.md: Use loongarch_split_move and
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loongarch_split_move_p directly.
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gcc/testsuite/ChangeLog:
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* gcc.target/loongarch/vector/lsx/lsx-mov-1.c: New test.
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---
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gcc/config/loongarch/lasx.md | 4 +-
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gcc/config/loongarch/loongarch-protos.h | 4 +-
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gcc/config/loongarch/loongarch.cc | 49 +------------------
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gcc/config/loongarch/lsx.md | 10 ++--
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.../loongarch/vector/lsx/lsx-mov-1.c | 14 ++++++
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5 files changed, 24 insertions(+), 57 deletions(-)
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create mode 100644 gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c
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diff --git a/gcc/config/loongarch/lasx.md b/gcc/config/loongarch/lasx.md
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index 46150f2fb..dbbf5a136 100644
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--- a/gcc/config/loongarch/lasx.md
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+++ b/gcc/config/loongarch/lasx.md
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@@ -839,10 +839,10 @@
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[(set (match_operand:LASX 0 "nonimmediate_operand")
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(match_operand:LASX 1 "move_operand"))]
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"reload_completed && ISA_HAS_LASX
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- && loongarch_split_move_insn_p (operands[0], operands[1])"
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+ && loongarch_split_move_p (operands[0], operands[1])"
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[(const_int 0)]
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{
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- loongarch_split_move_insn (operands[0], operands[1], curr_insn);
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+ loongarch_split_move (operands[0], operands[1]);
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DONE;
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})
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diff --git a/gcc/config/loongarch/loongarch-protos.h b/gcc/config/loongarch/loongarch-protos.h
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index e5fcf3111..2067e50c3 100644
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--- a/gcc/config/loongarch/loongarch-protos.h
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+++ b/gcc/config/loongarch/loongarch-protos.h
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@@ -82,11 +82,9 @@ extern rtx loongarch_legitimize_call_address (rtx);
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extern rtx loongarch_subword (rtx, bool);
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extern bool loongarch_split_move_p (rtx, rtx);
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-extern void loongarch_split_move (rtx, rtx, rtx);
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+extern void loongarch_split_move (rtx, rtx);
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extern bool loongarch_addu16i_imm12_operand_p (HOST_WIDE_INT, machine_mode);
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extern void loongarch_split_plus_constant (rtx *, machine_mode);
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-extern bool loongarch_split_move_insn_p (rtx, rtx);
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-extern void loongarch_split_move_insn (rtx, rtx, rtx);
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extern void loongarch_split_128bit_move (rtx, rtx);
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extern bool loongarch_split_128bit_move_p (rtx, rtx);
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extern void loongarch_split_256bit_move (rtx, rtx);
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diff --git a/gcc/config/loongarch/loongarch.cc b/gcc/config/loongarch/loongarch.cc
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index 56f631b1a..5c278386a 100644
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--- a/gcc/config/loongarch/loongarch.cc
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+++ b/gcc/config/loongarch/loongarch.cc
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@@ -2558,7 +2558,6 @@ loongarch_split_const_insns (rtx x)
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return low + high;
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}
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-bool loongarch_split_move_insn_p (rtx dest, rtx src);
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/* Return one word of 128-bit value OP, taking into account the fixed
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endianness of certain registers. BYTE selects from the byte address. */
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@@ -2598,7 +2597,7 @@ loongarch_load_store_insns (rtx mem, rtx_insn *insn)
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{
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set = single_set (insn);
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if (set
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- && !loongarch_split_move_insn_p (SET_DEST (set), SET_SRC (set)))
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+ && !loongarch_split_move_p (SET_DEST (set), SET_SRC (set)))
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might_split_p = false;
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}
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@@ -4216,7 +4215,7 @@ loongarch_split_move_p (rtx dest, rtx src)
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SPLIT_TYPE describes the split condition. */
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void
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-loongarch_split_move (rtx dest, rtx src, rtx insn_)
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+loongarch_split_move (rtx dest, rtx src)
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{
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rtx low_dest;
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@@ -4254,33 +4253,6 @@ loongarch_split_move (rtx dest, rtx src, rtx insn_)
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loongarch_subword (src, true));
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}
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}
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-
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- /* This is a hack. See if the next insn uses DEST and if so, see if we
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- can forward SRC for DEST. This is most useful if the next insn is a
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- simple store. */
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- rtx_insn *insn = (rtx_insn *) insn_;
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- struct loongarch_address_info addr = {};
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- if (insn)
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- {
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- rtx_insn *next = next_nonnote_nondebug_insn_bb (insn);
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- if (next)
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- {
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- rtx set = single_set (next);
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- if (set && SET_SRC (set) == dest)
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- {
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- if (MEM_P (src))
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- {
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- rtx tmp = XEXP (src, 0);
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- loongarch_classify_address (&addr, tmp, GET_MODE (tmp),
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- true);
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- if (addr.reg && !reg_overlap_mentioned_p (dest, addr.reg))
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- validate_change (next, &SET_SRC (set), src, false);
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- }
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- else
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- validate_change (next, &SET_SRC (set), src, false);
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- }
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- }
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- }
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}
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/* Check if adding an integer constant value for a specific mode can be
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@@ -4327,23 +4299,6 @@ loongarch_split_plus_constant (rtx *op, machine_mode mode)
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op[2] = gen_int_mode (v, mode);
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}
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-/* Return true if a move from SRC to DEST in INSN should be split. */
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-
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-bool
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-loongarch_split_move_insn_p (rtx dest, rtx src)
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-{
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- return loongarch_split_move_p (dest, src);
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-}
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-
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-/* Split a move from SRC to DEST in INSN, given that
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- loongarch_split_move_insn_p holds. */
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-
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-void
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-loongarch_split_move_insn (rtx dest, rtx src, rtx insn)
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-{
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- loongarch_split_move (dest, src, insn);
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-}
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-
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/* Implement TARGET_CONSTANT_ALIGNMENT. */
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static HOST_WIDE_INT
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diff --git a/gcc/config/loongarch/lsx.md b/gcc/config/loongarch/lsx.md
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index 7f5fff40a..3e3248ef4 100644
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--- a/gcc/config/loongarch/lsx.md
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+++ b/gcc/config/loongarch/lsx.md
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@@ -794,21 +794,21 @@
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})
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(define_insn "mov<mode>_lsx"
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- [(set (match_operand:LSX 0 "nonimmediate_operand" "=f,f,R,*r,*f")
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- (match_operand:LSX 1 "move_operand" "fYGYI,R,f,*f,*r"))]
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+ [(set (match_operand:LSX 0 "nonimmediate_operand" "=f,f,R,*r,*f,*r")
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+ (match_operand:LSX 1 "move_operand" "fYGYI,R,f,*f,*r,*r"))]
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"ISA_HAS_LSX"
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{ return loongarch_output_move (operands[0], operands[1]); }
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- [(set_attr "type" "simd_move,simd_load,simd_store,simd_copy,simd_insert")
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+ [(set_attr "type" "simd_move,simd_load,simd_store,simd_copy,simd_insert,simd_copy")
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(set_attr "mode" "<MODE>")])
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(define_split
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[(set (match_operand:LSX 0 "nonimmediate_operand")
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(match_operand:LSX 1 "move_operand"))]
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"reload_completed && ISA_HAS_LSX
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- && loongarch_split_move_insn_p (operands[0], operands[1])"
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+ && loongarch_split_move_p (operands[0], operands[1])"
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[(const_int 0)]
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{
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- loongarch_split_move_insn (operands[0], operands[1], curr_insn);
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+ loongarch_split_move (operands[0], operands[1]);
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DONE;
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})
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diff --git a/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c
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new file mode 100644
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index 000000000..7f9d792eb
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--- /dev/null
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+++ b/gcc/testsuite/gcc.target/loongarch/vector/lsx/lsx-mov-1.c
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@@ -0,0 +1,14 @@
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+/* { dg-do compile } */
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+/* { dg-options "-mlsx -O2" } */
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+
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+#include <lsxintrin.h>
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+
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+extern void bar (__m128i, __m128i);
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+
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+__m128i a;
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+
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+void
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+foo ()
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+{
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+ bar (a, a);
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+}
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--
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2.43.0
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