From 2aa68f56a13a74d4398f1cb51c67747a04e84146 Mon Sep 17 00:00:00 2001
From: Bingquan Mou <moubingquan@huawei.com>
Date: Mon, 30 Sep 2024 10:02:39 +0800
Subject: [PATCH 23/27] hikptool: Added the dfx register for PCIe dump.

category: feature
bugzilla: NA
CVE: NA

This register is added for PCIe dump.
MAC: MAC_REG_PHY_RXDATA_TS_REG/MAC_LTSSM_TRACER_CFG0_REG/MAC_POWERDOWN_VALUE_REG
PCS: DETECT_CLK_FLG_REG/SDS_CFG_REG_REG
GLB: PCIE_LINK_DOWN_CLR_PORT_EN_REG/CORE_CLK_FLG_REG

Signed-off-by: Bingquan Mou <moubingquan@huawei.com>
---
 pcie/func_lib/pcie_func/pcie_reg_dump.c | 7 +++++++
 1 file changed, 7 insertions(+)

diff --git a/pcie/func_lib/pcie_func/pcie_reg_dump.c b/pcie/func_lib/pcie_func/pcie_reg_dump.c
index 9444f64..abf0e26 100644
--- a/pcie/func_lib/pcie_func/pcie_reg_dump.c
+++ b/pcie/func_lib/pcie_func/pcie_reg_dump.c
@@ -129,6 +129,9 @@ struct pcie_dumpreg_info g_reg_table_mac[] = {
 	{0, "MAC_LEAVE_L0_INFO"},
 	{0, "DFX_APB_LANE_ERROR_STATUS_0"},
 	{0, "DFX_APB_LANE_ERROR_STATUS_1"},
+	{0, "MAC_REG_PHY_RXDATA_TS_REG"},
+	{0, "MAC_LTSSM_TRACER_CFG0_REG"},
+	{0, "MAC_POWERDOWN_VALUE_REG"},
 };
 
 struct pcie_dumpreg_info g_reg_table_pcs[] = {
@@ -141,6 +144,8 @@ struct pcie_dumpreg_info g_reg_table_pcs[] = {
 	HIKP_PCIE_PCS_LANE_TBL_ENTRY(LANE_INTR_STATUS),
 	HIKP_PCIE_PCS_LANE_TBL_ENTRY(M_PCS_RPT_REG),
 	HIKP_PCIE_PCS_LANE_TBL_ENTRY(MSG_BUS_DFX),
+	HIKP_PCIE_PCS_LANE_TBL_ENTRY(DETECT_CLK_FLG_REG),
+	HIKP_PCIE_PCS_LANE_TBL_ENTRY(SDS_CFG_REG_REG),
 };
 
 struct pcie_dumpreg_info g_reg_table_iob_tx[] = {
@@ -364,6 +369,8 @@ struct pcie_dumpreg_info g_reg_table_core_glb[] = {
 	{0, "CORE_INT_FE_RO_2"},
 	{0, "PORT07_LINK_MODE"},
 	{0, "PORT815_LINK_MODE"},
+	{0, "PCIE_LINK_DOWN_CLR_PORT_EN_REG"},
+	{0, "CORE_CLK_FLG_REG"},
 };
 
 struct pcie_dumpreg_info g_reg_table_core_tl[] = {
-- 
2.45.0.windows.1

