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!97 libwd: update the source code

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From: @xiao_jiang_shui 
Reviewed-by: @hao-fang 
Signed-off-by: @hao-fang
This commit is contained in:
openeuler-ci-bot 2024-11-26 02:56:06 +00:00 committed by Gitee
commit d714fe6c1b
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GPG Key ID: 173E9B9CA92EEF8F
24 changed files with 7572 additions and 1 deletions
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2146
0017-uadk-support-for-the-DAE-algorithm-layer.patch Normal file
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1771
0018-drv-dae-support-hashagg-algorithm.patch Normal file
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235
0019-uadk_tool-use-wd_xxx_init2_-instead-of-wd_xxx_init2.patch Normal file
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@ -0,0 +1,235 @@
From c0c3359090a8e6fcaf59c606dccee8e554c89ff2 Mon Sep 17 00:00:00 2001
From: Zhangfei Gao <zhangfei.gao@linaro.org>
Date: Wed, 28 Aug 2024 09:42:39 +0000
Subject: [PATCH 19/39] uadk_tool: use wd_xxx_init2_ instead of wd_xxx_init2
wd_xxx_init2 does not take para cparam, which take ctx number.
So default ctx number is used with poor performance.
numactl --cpubind=0 --membind=0 \
uadk_tool benchmark --alg sha512 --mode sva --opt 0 --async --pktlen 8192 \
--seconds 20 --multi 1 --thread 8 --ctxnum 8 --init2
sha512 8192Bytes 3982625.60KiB/s 497.8Kops 1292.90%
after fix:
numactl --cpubind=0 --membind=0 \
uadk_tool benchmark --alg sha512 --mode sva --opt 0 --async --pktlen 8192 \
--seconds 20 --multi 1 --thread 8 --ctxnum 8 --init2
sha512 8192Bytes 11276124.40KiB/s 1409.5Kops 1026.70%
Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
---
uadk_tool/benchmark/hpre_uadk_benchmark.c | 36 +++++++++++++++++++++--
uadk_tool/benchmark/sec_uadk_benchmark.c | 35 ++++++++++++++++++++--
uadk_tool/benchmark/zip_uadk_benchmark.c | 36 +++++++++++++++++++++--
3 files changed, 99 insertions(+), 8 deletions(-)
diff --git a/uadk_tool/benchmark/hpre_uadk_benchmark.c b/uadk_tool/benchmark/hpre_uadk_benchmark.c
index 5dd6a39..bc0687d 100644
--- a/uadk_tool/benchmark/hpre_uadk_benchmark.c
+++ b/uadk_tool/benchmark/hpre_uadk_benchmark.c
@@ -610,7 +610,10 @@ static void uninit_hpre_ctx_config2(int subtype)
static int init_hpre_ctx_config2(struct acc_option *options)
{
+ struct wd_ctx_params cparams = {0};
+ struct wd_ctx_nums *ctx_set_num;
int subtype = options->subtype;
+ int mode = options->syncmode;
char alg_name[MAX_ALG_NAME];
int ret;
@@ -620,22 +623,49 @@ static int init_hpre_ctx_config2(struct acc_option *options)
return -EINVAL;
}
+ ctx_set_num = calloc(1, sizeof(*ctx_set_num));
+ if (!ctx_set_num) {
+ WD_ERR("failed to alloc ctx_set_size!\n");
+ return -WD_ENOMEM;
+ }
+
+ cparams.op_type_num = 1;
+ cparams.ctx_set_num = ctx_set_num;
+ cparams.bmp = numa_allocate_nodemask();
+ if (!cparams.bmp) {
+ WD_ERR("failed to create nodemask!\n");
+ ret = -WD_ENOMEM;
+ goto out_freectx;
+ }
+
+ numa_bitmask_setall(cparams.bmp);
+
+ if (mode == CTX_MODE_SYNC)
+ ctx_set_num->sync_ctx_num = g_ctxnum;
+ else
+ ctx_set_num->async_ctx_num = g_ctxnum;
+
/* init2 */
switch (subtype) {
case RSA_TYPE:
- return wd_rsa_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ return wd_rsa_init2_(alg_name, SCHED_POLICY_RR, TASK_HW, &cparams);
case DH_TYPE:
- return wd_dh_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ return wd_dh_init2_(alg_name, SCHED_POLICY_RR, TASK_HW, &cparams);
case ECDH_TYPE:
case ECDSA_TYPE:
case SM2_TYPE:
case X25519_TYPE:
case X448_TYPE:
- return wd_ecc_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ return wd_ecc_init2_(alg_name, SCHED_POLICY_RR, TASK_HW, &cparams);
default:
HPRE_TST_PRT("failed to parse alg subtype on uninit2!\n");
return -EINVAL;
}
+
+out_freectx:
+ free(ctx_set_num);
+
+ return ret;
}
/*-------------------------------uadk benchmark main code-------------------------------------*/
diff --git a/uadk_tool/benchmark/sec_uadk_benchmark.c b/uadk_tool/benchmark/sec_uadk_benchmark.c
index 41b7416..411d0c4 100644
--- a/uadk_tool/benchmark/sec_uadk_benchmark.c
+++ b/uadk_tool/benchmark/sec_uadk_benchmark.c
@@ -795,7 +795,10 @@ static void uninit_ctx_config2(int subtype)
static int init_ctx_config2(struct acc_option *options)
{
+ struct wd_ctx_params cparams = {0};
+ struct wd_ctx_nums *ctx_set_num;
int subtype = options->subtype;
+ int mode = options->syncmode;
char alg_name[MAX_ALG_NAME];
int ret;
@@ -805,10 +808,32 @@ static int init_ctx_config2(struct acc_option *options)
return -EINVAL;
}
+ ctx_set_num = calloc(1, sizeof(*ctx_set_num));
+ if (!ctx_set_num) {
+ WD_ERR("failed to alloc ctx_set_size!\n");
+ return -WD_ENOMEM;
+ }
+
+ cparams.op_type_num = 1;
+ cparams.ctx_set_num = ctx_set_num;
+ cparams.bmp = numa_allocate_nodemask();
+ if (!cparams.bmp) {
+ WD_ERR("failed to create nodemask!\n");
+ ret = -WD_ENOMEM;
+ goto out_freectx;
+ }
+
+ numa_bitmask_setall(cparams.bmp);
+
+ if (mode == CTX_MODE_SYNC)
+ ctx_set_num->sync_ctx_num = g_ctxnum;
+ else
+ ctx_set_num->async_ctx_num = g_ctxnum;
+
/* init */
switch(subtype) {
case CIPHER_TYPE:
- ret = wd_cipher_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ ret = wd_cipher_init2_(alg_name, SCHED_POLICY_RR, TASK_HW, &cparams);
if (ret)
SEC_TST_PRT("failed to do cipher init2!\n");
break;
@@ -818,12 +843,12 @@ static int init_ctx_config2(struct acc_option *options)
SEC_TST_PRT("failed to do cipher intruction init2!\n");
break;
case AEAD_TYPE:
- ret = wd_aead_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ ret = wd_aead_init2_(alg_name, SCHED_POLICY_RR, TASK_HW, &cparams);
if (ret)
SEC_TST_PRT("failed to do aead init2!\n");
break;
case DIGEST_TYPE:
- ret = wd_digest_init2(alg_name, options->sched_type, options->task_type);
+ ret = wd_digest_init2_(alg_name, options->sched_type, options->task_type, &cparams);
if (ret)
SEC_TST_PRT("failed to do digest init2!\n");
break;
@@ -833,7 +858,11 @@ static int init_ctx_config2(struct acc_option *options)
return ret;
}
+out_freectx:
+ free(ctx_set_num);
+
return ret;
+
}
static void get_aead_data(u8 *addr, u32 size)
diff --git a/uadk_tool/benchmark/zip_uadk_benchmark.c b/uadk_tool/benchmark/zip_uadk_benchmark.c
index 22aa916..2133297 100644
--- a/uadk_tool/benchmark/zip_uadk_benchmark.c
+++ b/uadk_tool/benchmark/zip_uadk_benchmark.c
@@ -299,8 +299,11 @@ static void uninit_ctx_config2(void)
static int init_ctx_config2(struct acc_option *options)
{
+ struct wd_ctx_params cparams = {0};
+ struct wd_ctx_nums *ctx_set_num;
+ int mode = options->syncmode;
char alg_name[MAX_ALG_NAME];
- int ret = 0;
+ int ret;
ret = get_alg_name(options->algtype, alg_name);
if (ret) {
@@ -308,14 +311,43 @@ static int init_ctx_config2(struct acc_option *options)
return -EINVAL;
}
+ ctx_set_num = calloc(WD_DIR_MAX, sizeof(*ctx_set_num));
+ if (!ctx_set_num) {
+ WD_ERR("failed to alloc ctx_set_size!\n");
+ return -WD_ENOMEM;
+ }
+
+ cparams.op_type_num = WD_DIR_MAX;
+ cparams.ctx_set_num = ctx_set_num;
+ cparams.bmp = numa_allocate_nodemask();
+ if (!cparams.bmp) {
+ WD_ERR("failed to create nodemask!\n");
+ ret = -WD_ENOMEM;
+ goto out_freectx;
+ }
+
+ numa_bitmask_setall(cparams.bmp);
+
+ for (int i = 0; i < WD_DIR_MAX; i++) {
+ if (mode == CTX_MODE_SYNC)
+ ctx_set_num[i].sync_ctx_num = g_ctxnum;
+ else
+ ctx_set_num[i].async_ctx_num = g_ctxnum;
+ }
+
/* init */
- ret = wd_comp_init2(alg_name, SCHED_POLICY_RR, TASK_HW);
+ ret = wd_comp_init2_(alg_name, SCHED_POLICY_RR, TASK_HW, &cparams);
if (ret) {
ZIP_TST_PRT("failed to do comp init2!\n");
return ret;
}
return 0;
+
+out_freectx:
+ free(ctx_set_num);
+
+ return ret;
}
static int specified_device_request_ctx(struct acc_option *options)
--
2.25.1

90
0020-uadk-isa-ce-fix-sm4-CE-driver-initialization-error.patch Normal file
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@ -0,0 +1,90 @@
From bdcebcd37ec5745e19d2e72447ce56edbeabaac9 Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Thu, 5 Sep 2024 19:25:16 +0800
Subject: [PATCH 20/39] uadk/isa-ce: fix sm4 CE driver initialization error.
CE driver of sm4 should alloc and free private ctx by himself.
The cleancode issue of sm3 CE driver is also solved.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/isa_ce_sm3.c | 15 ++++++---------
drv/isa_ce_sm4.c | 18 +++++++++++++++---
2 files changed, 21 insertions(+), 12 deletions(-)
diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c
index 59f3940..99cd640 100644
--- a/drv/isa_ce_sm3.c
+++ b/drv/isa_ce_sm3.c
@@ -373,22 +373,19 @@ static int sm3_ce_drv_recv(struct wd_alg_driver *drv, handle_t ctx, void *digest
static int sm3_ce_drv_init(struct wd_alg_driver *drv, void *conf)
{
struct wd_ctx_config_internal *config = (struct wd_ctx_config_internal *)conf;
- struct sm3_ce_drv_ctx *sctx = (struct sm3_ce_drv_ctx *)drv->priv;
+ struct sm3_ce_drv_ctx *priv;
/* Fallback init is NULL */
if (!drv || !conf)
return 0;
- config->epoll_en = 0;
-
- /* return if already inited */
- if (sctx)
- return WD_SUCCESS;
- sctx = malloc(sizeof(struct sm3_ce_drv_ctx));
- if (!sctx)
+ priv = malloc(sizeof(struct sm3_ce_drv_ctx));
+ if (!priv)
return -WD_EINVAL;
- memcpy(&sctx->config, config, sizeof(struct wd_ctx_config_internal));
+ config->epoll_en = 0;
+ memcpy(&priv->config, config, sizeof(struct wd_ctx_config_internal));
+ drv->priv = priv;
return WD_SUCCESS;
}
diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c
index e937893..3404465 100644
--- a/drv/isa_ce_sm4.c
+++ b/drv/isa_ce_sm4.c
@@ -34,20 +34,32 @@
static int isa_ce_init(struct wd_alg_driver *drv, void *conf)
{
struct wd_ctx_config_internal *config = conf;
- struct sm4_ce_drv_ctx *sctx = drv->priv;
+ struct sm4_ce_drv_ctx *priv;
/* Fallback init is NULL */
if (!drv || !conf)
return 0;
+ priv = malloc(sizeof(struct sm4_ce_drv_ctx));
+ if (!priv)
+ return -WD_EINVAL;
+
config->epoll_en = 0;
- memcpy(&sctx->config, config, sizeof(struct wd_ctx_config_internal));
+ memcpy(&priv->config, config, sizeof(struct wd_ctx_config_internal));
+ drv->priv = priv;
- return 0;
+ return WD_SUCCESS;
}
static void isa_ce_exit(struct wd_alg_driver *drv)
{
+ struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv;
+
+ if (!sctx)
+ return;
+
+ free(sctx);
+ drv->priv = NULL;
}
/* increment upper 96 bits of 128-bit counter by 1 */
--
2.25.1

169
0021-acc-uadk-fix-queue-configuration-parameter-error.patch Normal file
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@ -0,0 +1,169 @@
From 05b1b0b349a88f5d8db91f485e2d19a10a1aefdc Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Wed, 18 Sep 2024 09:59:10 +0800
Subject: [PATCH 21/39] acc/uadk: fix queue configuration parameter error
When executing an asynchronous task, the scheduler may
incorrectly specify a synchronous queue.
This will cause an error in the queue configuration
parameters and result in a segment error.
In wd_get_msg_from_pool(), msg_num == 0 indicates that
the asynchronous task scheduler is executed but the
synchronous queue is specified.Therefore,
when msg_num == 0 is detected in this function,
the program needs to return an exception immediately
to avoid errors.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
wd_aead.c | 2 +-
wd_agg.c | 4 ++--
wd_cipher.c | 4 ++--
wd_comp.c | 2 +-
wd_dh.c | 6 ++++--
wd_digest.c | 4 ++--
wd_ecc.c | 6 ++++--
wd_rsa.c | 6 ++++--
wd_util.c | 4 ++++
9 files changed, 24 insertions(+), 14 deletions(-)
diff --git a/wd_aead.c b/wd_aead.c
index 65949f7..608f0e6 100644
--- a/wd_aead.c
+++ b/wd_aead.c
@@ -805,7 +805,7 @@ int wd_do_aead_async(handle_t h_sess, struct wd_aead_req *req)
idx, (void **)&msg);
if (unlikely(msg_id < 0)) {
WD_ERR("failed to get msg from pool!\n");
- return -WD_EBUSY;
+ return msg_id;
}
fill_request_msg(msg, req, sess);
diff --git a/wd_agg.c b/wd_agg.c
index e493bb8..b536efe 100644
--- a/wd_agg.c
+++ b/wd_agg.c
@@ -1192,8 +1192,8 @@ static int wd_agg_async_job(struct wd_agg_sess *sess, struct wd_agg_req *req, bo
ctx = config->ctxs + idx;
msg_id = wd_get_msg_from_pool(&wd_agg_setting.pool, idx, (void **)&msg);
if (unlikely(msg_id < 0)) {
- WD_ERR("busy, failed to get agg msg from pool!\n");
- return -WD_EBUSY;
+ WD_ERR("failed to get agg msg from pool!\n");
+ return msg_id;
}
if (is_input)
diff --git a/wd_cipher.c b/wd_cipher.c
index 646aa89..f6b035a 100644
--- a/wd_cipher.c
+++ b/wd_cipher.c
@@ -741,8 +741,8 @@ int wd_do_cipher_async(handle_t h_sess, struct wd_cipher_req *req)
msg_id = wd_get_msg_from_pool(&wd_cipher_setting.pool, idx,
(void **)&msg);
if (unlikely(msg_id < 0)) {
- WD_ERR("busy, failed to get msg from pool!\n");
- return -WD_EBUSY;
+ WD_ERR("failed to get msg from pool!\n");
+ return msg_id;
}
fill_request_msg(msg, req, sess);
diff --git a/wd_comp.c b/wd_comp.c
index 34ddbcf..0fa5f92 100644
--- a/wd_comp.c
+++ b/wd_comp.c
@@ -860,7 +860,7 @@ int wd_do_comp_async(handle_t h_sess, struct wd_comp_req *req)
tag = wd_get_msg_from_pool(&wd_comp_setting.pool, idx, (void **)&msg);
if (unlikely(tag < 0)) {
WD_ERR("failed to get msg from pool!\n");
- return -WD_EBUSY;
+ return tag;
}
fill_comp_msg(sess, msg, req);
msg->tag = tag;
diff --git a/wd_dh.c b/wd_dh.c
index cdcba14..043c3be 100644
--- a/wd_dh.c
+++ b/wd_dh.c
@@ -422,8 +422,10 @@ int wd_do_dh_async(handle_t sess, struct wd_dh_req *req)
ctx = config->ctxs + idx;
mid = wd_get_msg_from_pool(&wd_dh_setting.pool, idx, (void **)&msg);
- if (mid < 0)
- return -WD_EBUSY;
+ if (unlikely(mid < 0)) {
+ WD_ERR("failed to get msg from pool!\n");
+ return mid;
+ }
ret = fill_dh_msg(msg, req, (struct wd_dh_sess *)sess);
if (ret)
diff --git a/wd_digest.c b/wd_digest.c
index 943fd8c..58f621a 100644
--- a/wd_digest.c
+++ b/wd_digest.c
@@ -706,8 +706,8 @@ int wd_do_digest_async(handle_t h_sess, struct wd_digest_req *req)
msg_id = wd_get_msg_from_pool(&wd_digest_setting.pool, idx,
(void **)&msg);
if (unlikely(msg_id < 0)) {
- WD_ERR("busy, failed to get msg from pool!\n");
- return -WD_EBUSY;
+ WD_ERR("failed to get msg from pool!\n");
+ return msg_id;
}
fill_request_msg(msg, req, dsess);
diff --git a/wd_ecc.c b/wd_ecc.c
index 7c0c77a..b1712c5 100644
--- a/wd_ecc.c
+++ b/wd_ecc.c
@@ -2268,8 +2268,10 @@ int wd_do_ecc_async(handle_t sess, struct wd_ecc_req *req)
ctx = config->ctxs + idx;
mid = wd_get_msg_from_pool(&wd_ecc_setting.pool, idx, (void **)&msg);
- if (mid < 0)
- return -WD_EBUSY;
+ if (unlikely(mid < 0)) {
+ WD_ERR("failed to get msg from pool!\n");
+ return mid;
+ }
ret = fill_ecc_msg(msg, req, (struct wd_ecc_sess *)sess);
if (ret)
diff --git a/wd_rsa.c b/wd_rsa.c
index b858491..366e766 100644
--- a/wd_rsa.c
+++ b/wd_rsa.c
@@ -483,8 +483,10 @@ int wd_do_rsa_async(handle_t sess, struct wd_rsa_req *req)
ctx = config->ctxs + idx;
mid = wd_get_msg_from_pool(&wd_rsa_setting.pool, idx, (void **)&msg);
- if (mid < 0)
- return -WD_EBUSY;
+ if (unlikely(mid < 0)) {
+ WD_ERR("failed to get msg from pool!\n");
+ return mid;
+ }
ret = fill_rsa_msg(msg, req, (struct wd_rsa_sess *)sess);
if (ret)
diff --git a/wd_util.c b/wd_util.c
index 8adfd4c..d58e8b8 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -442,6 +442,10 @@ int wd_get_msg_from_pool(struct wd_async_msg_pool *pool,
__u32 cnt = 0;
__u32 idx = p->tail;
+ /* Scheduler set a sync ctx */
+ if (!msg_num)
+ return -WD_EINVAL;
+
while (__atomic_test_and_set(&p->used[idx], __ATOMIC_ACQUIRE)) {
idx = (idx + 1) % msg_num;
cnt++;
--
2.25.1

29
0022-acc-uadk-fix-double-free-error.patch Normal file
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@ -0,0 +1,29 @@
From 5d709269eb00c7b7edd95da5eb467c9aad72263d Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Wed, 18 Sep 2024 10:02:04 +0800
Subject: [PATCH 22/39] acc/uadk: fix double-free error
Fix double-free error.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
wd.c | 3 ---
1 file changed, 3 deletions(-)
diff --git a/wd.c b/wd.c
index abadcf9..6d01158 100644
--- a/wd.c
+++ b/wd.c
@@ -938,9 +938,6 @@ void wd_release_alg_cap(struct wd_capability *head)
cap_pnext = cap_pnext->next;
free(cap_node);
}
-
- if (head)
- free(head);
}
struct wd_capability *wd_get_alg_cap(void)
--
2.25.1

119
0023-uadk-fix-the-null-pointer-check-error.patch Normal file
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@ -0,0 +1,119 @@
From e002fec5535a971db0c95a27290e61e3ae844a4c Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Fri, 20 Sep 2024 15:13:53 +0800
Subject: [PATCH 23/39] uadk: fix the null pointer check error
After the pointer is used, the null pointer check is performed,
which is incorrect.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_comp.c | 3 ++-
drv/hisi_hpre.c | 3 ++-
v1/drv/hisi_zip_udrv.c | 3 ++-
wd_zlibwrapper.c | 8 ++++----
4 files changed, 10 insertions(+), 7 deletions(-)
diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c
index 2fa5eff..4c8e18b 100644
--- a/drv/hisi_comp.c
+++ b/drv/hisi_comp.c
@@ -836,7 +836,7 @@ out:
static void hisi_zip_exit(struct wd_alg_driver *drv)
{
struct hisi_zip_ctx *priv = (struct hisi_zip_ctx *)drv->priv;
- struct wd_ctx_config_internal *config = &priv->config;
+ struct wd_ctx_config_internal *config;
handle_t h_qp;
__u32 i;
@@ -845,6 +845,7 @@ static void hisi_zip_exit(struct wd_alg_driver *drv)
return;
}
+ config = &priv->config;
for (i = 0; i < config->ctx_num; i++) {
h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx);
hisi_qm_free_qp(h_qp);
diff --git a/drv/hisi_hpre.c b/drv/hisi_hpre.c
index 68a11ae..37bb5ee 100644
--- a/drv/hisi_hpre.c
+++ b/drv/hisi_hpre.c
@@ -584,7 +584,7 @@ static int hpre_ecc_init(struct wd_alg_driver *drv, void *conf)
static void hpre_exit(struct wd_alg_driver *drv)
{
struct hisi_hpre_ctx *priv = (struct hisi_hpre_ctx *)drv->priv;
- struct wd_ctx_config_internal *config = &priv->config;
+ struct wd_ctx_config_internal *config;
handle_t h_qp;
__u32 i;
@@ -593,6 +593,7 @@ static void hpre_exit(struct wd_alg_driver *drv)
return;
}
+ config = &priv->config;
for (i = 0; i < config->ctx_num; i++) {
h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx);
hisi_qm_free_qp(h_qp);
diff --git a/v1/drv/hisi_zip_udrv.c b/v1/drv/hisi_zip_udrv.c
index cc55ef5..01d76a3 100644
--- a/v1/drv/hisi_zip_udrv.c
+++ b/v1/drv/hisi_zip_udrv.c
@@ -254,7 +254,6 @@ int qm_parse_zip_sqe(void *hw_msg, const struct qm_queue_info *info,
__u16 i, __u16 usr)
{
struct wcrypto_comp_msg *recv_msg = info->req_cache[i];
- struct wcrypto_comp_tag *tag = (void *)(uintptr_t)recv_msg->udata;
struct hisi_zip_sqe *sqe = hw_msg;
__u16 ctx_st = sqe->ctx_dw0 & HZ_CTX_ST_MASK;
__u16 lstblk = sqe->dw3 & HZ_LSTBLK_MASK;
@@ -262,12 +261,14 @@ int qm_parse_zip_sqe(void *hw_msg, const struct qm_queue_info *info,
__u32 type = sqe->dw9 & HZ_REQ_TYPE_MASK;
uintptr_t phy_in, phy_out, phy_ctxbuf;
struct wd_queue *q = info->q;
+ struct wcrypto_comp_tag *tag;
if (unlikely(!recv_msg)) {
WD_ERR("info->req_cache is null at index:%hu\n", i);
return 0;
}
+ tag = (void *)(uintptr_t)recv_msg->udata;
if (usr && sqe->tag != usr)
return 0;
diff --git a/wd_zlibwrapper.c b/wd_zlibwrapper.c
index 953837a..b3b315f 100644
--- a/wd_zlibwrapper.c
+++ b/wd_zlibwrapper.c
@@ -220,9 +220,6 @@ static int wd_zlib_do_request(z_streamp strm, int flush, enum wd_comp_op_type ty
__u32 dst_len = strm->avail_out;
int ret;
- if (unlikely(!strm))
- return Z_STREAM_ERROR;
-
if (unlikely(flush != Z_SYNC_FLUSH && flush != Z_FINISH)) {
WD_ERR("invalid: flush is %d!\n", flush);
return Z_STREAM_ERROR;
@@ -267,12 +264,15 @@ int wd_deflate_init(z_streamp strm, int level, int windowbits)
int wd_deflate(z_streamp strm, int flush)
{
+ if (unlikely(!strm))
+ return Z_STREAM_ERROR;
+
return wd_zlib_do_request(strm, flush, WD_DIR_COMPRESS);
}
int wd_deflate_reset(z_streamp strm)
{
- if (!strm)
+ if (unlikely(!strm))
return Z_STREAM_ERROR;
wd_comp_reset_sess((handle_t)strm->reserved);
--
2.25.1

172
0024-uadk-add-null-pointer-check.patch Normal file
View File

@ -0,0 +1,172 @@
From 3765bba6fceaa59f2afdd32e4061bbde07797c57 Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Thu, 10 Oct 2024 11:36:44 +0800
Subject: [PATCH 24/39] uadk: add null pointer check
Add null pointer check to avoid segment errors.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hash_mb/hash_mb.c | 6 +++---
drv/hisi_comp.c | 8 +++-----
drv/hisi_dae.c | 6 +++---
drv/hisi_hpre.c | 8 +++-----
drv/hisi_sec.c | 8 +++-----
drv/isa_ce_sm3.c | 6 +++---
drv/isa_ce_sm4.c | 6 +++---
7 files changed, 21 insertions(+), 27 deletions(-)
diff --git a/drv/hash_mb/hash_mb.c b/drv/hash_mb/hash_mb.c
index e4a9564..9ad36b8 100644
--- a/drv/hash_mb/hash_mb.c
+++ b/drv/hash_mb/hash_mb.c
@@ -217,11 +217,11 @@ static int hash_mb_init(struct wd_alg_driver *drv, void *conf)
static void hash_mb_exit(struct wd_alg_driver *drv)
{
- struct hash_mb_ctx *priv = (struct hash_mb_ctx *)drv->priv;
-
- if (!priv)
+ if(!drv || !drv->priv)
return;
+ struct hash_mb_ctx *priv = (struct hash_mb_ctx *)drv->priv;
+
hash_mb_queue_uninit(&priv->config, priv->config.ctx_num);
free(priv);
drv->priv = NULL;
diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c
index 4c8e18b..c556998 100644
--- a/drv/hisi_comp.c
+++ b/drv/hisi_comp.c
@@ -835,16 +835,14 @@ out:
static void hisi_zip_exit(struct wd_alg_driver *drv)
{
+ if(!drv || !drv->priv)
+ return;
+
struct hisi_zip_ctx *priv = (struct hisi_zip_ctx *)drv->priv;
struct wd_ctx_config_internal *config;
handle_t h_qp;
__u32 i;
- if (!priv) {
- /* return if already exit */
- return;
- }
-
config = &priv->config;
for (i = 0; i < config->ctx_num; i++) {
h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx);
diff --git a/drv/hisi_dae.c b/drv/hisi_dae.c
index 09d2387..864d21b 100644
--- a/drv/hisi_dae.c
+++ b/drv/hisi_dae.c
@@ -1604,14 +1604,14 @@ out:
static void dae_exit(struct wd_alg_driver *drv)
{
+ if(!drv || !drv->priv)
+ return;
+
struct hisi_dae_ctx *priv = (struct hisi_dae_ctx *)drv->priv;
struct wd_ctx_config_internal *config;
handle_t h_qp;
__u32 i;
- if (!priv)
- return;
-
config = &priv->config;
for (i = 0; i < config->ctx_num; i++) {
h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx);
diff --git a/drv/hisi_hpre.c b/drv/hisi_hpre.c
index 37bb5ee..313cdcc 100644
--- a/drv/hisi_hpre.c
+++ b/drv/hisi_hpre.c
@@ -583,16 +583,14 @@ static int hpre_ecc_init(struct wd_alg_driver *drv, void *conf)
static void hpre_exit(struct wd_alg_driver *drv)
{
+ if(!drv || !drv->priv)
+ return;
+
struct hisi_hpre_ctx *priv = (struct hisi_hpre_ctx *)drv->priv;
struct wd_ctx_config_internal *config;
handle_t h_qp;
__u32 i;
- if (!priv) {
- /* return if already exit */
- return;
- }
-
config = &priv->config;
for (i = 0; i < config->ctx_num; i++) {
h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx);
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 0a1bcc1..6377586 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -3102,16 +3102,14 @@ out:
static void hisi_sec_exit(struct wd_alg_driver *drv)
{
+ if(!drv || !drv->priv)
+ return;
+
struct hisi_sec_ctx *priv = (struct hisi_sec_ctx *)drv->priv;
struct wd_ctx_config_internal *config;
handle_t h_qp;
__u32 i;
- if (!priv) {
- /* return if already exit */
- return;
- }
-
config = &priv->config;
for (i = 0; i < config->ctx_num; i++) {
h_qp = (handle_t)wd_ctx_get_priv(config->ctxs[i].ctx);
diff --git a/drv/isa_ce_sm3.c b/drv/isa_ce_sm3.c
index 99cd640..54c2a9e 100644
--- a/drv/isa_ce_sm3.c
+++ b/drv/isa_ce_sm3.c
@@ -392,11 +392,11 @@ static int sm3_ce_drv_init(struct wd_alg_driver *drv, void *conf)
static void sm3_ce_drv_exit(struct wd_alg_driver *drv)
{
- struct sm3_ce_drv_ctx *sctx = (struct sm3_ce_drv_ctx *)drv->priv;
-
- if (!sctx)
+ if(!drv || !drv->priv)
return;
+ struct sm3_ce_drv_ctx *sctx = (struct sm3_ce_drv_ctx *)drv->priv;
+
free(sctx);
drv->priv = NULL;
}
diff --git a/drv/isa_ce_sm4.c b/drv/isa_ce_sm4.c
index 3404465..5e448fa 100644
--- a/drv/isa_ce_sm4.c
+++ b/drv/isa_ce_sm4.c
@@ -53,11 +53,11 @@ static int isa_ce_init(struct wd_alg_driver *drv, void *conf)
static void isa_ce_exit(struct wd_alg_driver *drv)
{
- struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv;
-
- if (!sctx)
+ if(!drv || !drv->priv)
return;
+ struct sm4_ce_drv_ctx *sctx = (struct sm4_ce_drv_ctx *)drv->priv;
+
free(sctx);
drv->priv = NULL;
}
--
2.25.1

1060
0025-uadk-test-move-main-function-to-testsuit.c-and-rm.patch Normal file
View File

File diff suppressed because it is too large Load Diff

42
0026-uadk-fix-for-sec-software-compute-check.patch Normal file
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@ -0,0 +1,42 @@
From b6790254696fd1d67a798d9d2523cf3ec03b6e3d Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Thu, 10 Oct 2024 15:54:18 +0800
Subject: [PATCH 26/39] uadk: fix for sec software compute check
For aead stream mode, the final message is not sent to hardware when
the qm V3 version is used or when the length of the message is 0,
so software compute check should return true to stop qm_recv process.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_sec.c | 13 +++++++++++--
1 file changed, 11 insertions(+), 2 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 6377586..9d69831 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -2647,8 +2647,17 @@ static void parse_aead_bd2(struct hisi_qp *qp, struct hisi_sec_sqe *sqe,
static bool soft_compute_check(struct hisi_qp *qp, struct wd_aead_msg *msg)
{
/* Asynchronous mode does not use the sent message, so ignores it */
- if (msg->cmode == WD_CIPHER_GCM)
- return (msg->msg_state == AEAD_MSG_END) && qp->q_info.qp_mode == CTX_MODE_SYNC;
+ if (qp->q_info.qp_mode == CTX_MODE_ASYNC)
+ return false;
+ /*
+ * For aead gcm stream mode, due to some hardware limitations,
+ * the final message was not sent to hardware if the qm is
+ * not higher than v3 version or the input length of the
+ * message is 0, the software calculation has been executed.
+ */
+ if (msg->msg_state == AEAD_MSG_END && msg->cmode == WD_CIPHER_GCM &&
+ (qp->q_info.hw_type <= HISI_QM_API_VER3_BASE || !msg->in_bytes))
+ return true;
return false;
}
--
2.25.1

85
0027-uadk-fix-some-code-bugs.patch Normal file
View File

@ -0,0 +1,85 @@
From e18ed1501180603036224a139a977634de4ddcf4 Mon Sep 17 00:00:00 2001
From: Longfang Liu <liulongfang@huawei.com>
Date: Thu, 10 Oct 2024 15:56:04 +0800
Subject: [PATCH 27/39] uadk: fix some code bugs
There are some previously undiscovered issues in these code files.
These issues include:
1. Unchecked function return value
2. Unverified external input parameters
3. Illegal assignment operation
Therefore, it needs to be fixed.
Signed-off-by: Longfang Liu <liulongfang@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_comp.c | 2 ++
wd_ecc.c | 6 +++---
wd_util.c | 11 +++++++++--
3 files changed, 14 insertions(+), 5 deletions(-)
diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c
index c556998..b4c216f 100644
--- a/drv/hisi_comp.c
+++ b/drv/hisi_comp.c
@@ -510,6 +510,8 @@ static int fill_buf_lz77_zstd_sgl(handle_t h_qp, struct hisi_zip_sqe *sqe,
fill_buf_type_sgl(sqe);
seq_start = get_seq_start_list(req);
+ if (unlikely(!seq_start))
+ return -WD_EINVAL;
data->literals_start = req->list_dst;
data->sequences_start = seq_start;
diff --git a/wd_ecc.c b/wd_ecc.c
index b1712c5..292338a 100644
--- a/wd_ecc.c
+++ b/wd_ecc.c
@@ -1504,7 +1504,7 @@ static int fill_ecc_msg(struct wd_ecc_msg *msg, struct wd_ecc_req *req,
void *key = NULL;
memcpy(&msg->req, req, sizeof(msg->req));
- msg->hash = sess->setup.hash;
+ memcpy(&msg->hash, &sess->setup.hash, sizeof(msg->hash));
msg->key_bytes = sess->key_size;
msg->curve_id = sess->setup.cv.cfg.id;
msg->result = WD_EINVAL;
@@ -1655,10 +1655,10 @@ static int set_sign_in_param(struct wd_ecc_sign_in *sin,
static int generate_random(struct wd_ecc_sess *sess, struct wd_dtb *k)
{
- struct wd_rand_mt rand_t = sess->setup.rand;
+ struct wd_rand_mt *rand_t = &sess->setup.rand;
int ret;
- ret = rand_t.cb(k->data, k->dsize, rand_t.usr);
+ ret = rand_t->cb(k->data, k->dsize, rand_t->usr);
if (ret)
WD_ERR("failed to do rand cb, ret = %d!\n", ret);
diff --git a/wd_util.c b/wd_util.c
index d58e8b8..e908dcb 100644
--- a/wd_util.c
+++ b/wd_util.c
@@ -421,8 +421,15 @@ void wd_uninit_async_request_pool(struct wd_async_msg_pool *pool)
void *wd_find_msg_in_pool(struct wd_async_msg_pool *pool,
int ctx_idx, __u32 tag)
{
- struct msg_pool *p = &pool->pools[ctx_idx];
- __u32 msg_num = p->msg_num;
+ struct msg_pool *p;
+ __u32 msg_num;
+
+ if ((__u32)ctx_idx > pool->pool_num) {
+ WD_ERR("invalid: message ctx id index is %d!\n", ctx_idx);
+ return NULL;
+ }
+ p = &pool->pools[ctx_idx];
+ msg_num = p->msg_num;
/* tag value start from 1 */
if (tag == 0 || tag > msg_num) {
--
2.25.1

75
0028-uadk-cipher-add-length-check-of-CBC_CTS-mode.patch Normal file
View File

@ -0,0 +1,75 @@
From 11e9545abb4e861f2cc589dfa76f20564033c995 Mon Sep 17 00:00:00 2001
From: Yang Shen <shenyang39@huawei.com>
Date: Fri, 11 Oct 2024 11:27:54 +0800
Subject: [PATCH 28/39] uadk/cipher - add length check of CBC_CTS mode
Add length check of CBC_CTS mode.
Signed-off-by: Yang Shen <shenyang39@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
wd_cipher.c | 30 ++++++++++++++++++++++--------
1 file changed, 22 insertions(+), 8 deletions(-)
diff --git a/wd_cipher.c b/wd_cipher.c
index f6b035a..ec6fb15 100644
--- a/wd_cipher.c
+++ b/wd_cipher.c
@@ -588,9 +588,10 @@ static int cipher_iv_len_check(struct wd_cipher_req *req,
return ret;
}
-static int cipher_len_check(handle_t h_sess, struct wd_cipher_req *req)
+static int cipher_in_len_check(handle_t h_sess, struct wd_cipher_req *req)
{
struct wd_cipher_sess *sess = (struct wd_cipher_sess *)h_sess;
+ int ret = 0;
if (!req->in_bytes) {
WD_ERR("invalid: cipher input length is zero!\n");
@@ -600,14 +601,27 @@ static int cipher_len_check(handle_t h_sess, struct wd_cipher_req *req)
if (sess->alg != WD_CIPHER_AES && sess->alg != WD_CIPHER_SM4)
return 0;
- if ((req->in_bytes & (AES_BLOCK_SIZE - 1)) &&
- (sess->mode == WD_CIPHER_CBC || sess->mode == WD_CIPHER_ECB)) {
- WD_ERR("failed to check input bytes of AES or SM4, size = %u\n",
- req->in_bytes);
- return -WD_EINVAL;
+ switch (sess->mode) {
+ case WD_CIPHER_ECB:
+ case WD_CIPHER_CBC:
+ if (req->in_bytes & (AES_BLOCK_SIZE - 1))
+ ret = -WD_EINVAL;
+ break;
+ case WD_CIPHER_CBC_CS1:
+ case WD_CIPHER_CBC_CS2:
+ case WD_CIPHER_CBC_CS3:
+ if (req->in_bytes < AES_BLOCK_SIZE)
+ ret = -WD_EINVAL;
+ break;
+ default:
+ break;
}
- return 0;
+ if (ret)
+ WD_ERR("invalid: %s input bytes is %u!\n",
+ wd_cipher_alg_name[sess->alg][sess->mode], req->in_bytes);
+
+ return ret;
}
static int wd_cipher_check_params(handle_t h_sess,
@@ -632,7 +646,7 @@ static int wd_cipher_check_params(handle_t h_sess,
return -WD_EINVAL;
}
- ret = cipher_len_check(h_sess, req);
+ ret = cipher_in_len_check(h_sess, req);
if (unlikely(ret))
return ret;
--
2.25.1

121
0029-uadk-fix-for-cipher-update-iv.patch Normal file
View File

@ -0,0 +1,121 @@
From d99d0e2683c6507304f72905b773623968c0962a Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 11 Oct 2024 11:29:45 +0800
Subject: [PATCH 29/39] uadk: fix for cipher update iv
The cipher iv is incorrectly updated, as a result, the uadk
fails to encrypt data. The CFB, OFB, and CTR mode are modified
according to the algorithm protocol.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_sec.c | 40 ++++++++++++++++++++++++++++------------
wd_cipher.c | 6 ++++++
2 files changed, 34 insertions(+), 12 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index 9d69831..bdde39f 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -733,11 +733,14 @@ static void ctr_iv_inc(__u8 *counter, __u32 len)
static void update_iv(struct wd_cipher_msg *msg)
{
+ __u8 i;
+
switch (msg->mode) {
case WD_CIPHER_CBC:
case WD_CIPHER_CBC_CS1:
case WD_CIPHER_CBC_CS2:
case WD_CIPHER_CBC_CS3:
+ case WD_CIPHER_CFB:
if (msg->op_type == WD_CIPHER_ENCRYPTION &&
msg->out_bytes >= msg->iv_bytes)
memcpy(msg->iv, msg->out + msg->out_bytes -
@@ -748,14 +751,15 @@ static void update_iv(struct wd_cipher_msg *msg)
msg->iv_bytes, msg->iv_bytes);
break;
case WD_CIPHER_OFB:
- case WD_CIPHER_CFB:
- if (msg->out_bytes >= msg->iv_bytes)
- memcpy(msg->iv, msg->out + msg->out_bytes -
- msg->iv_bytes, msg->iv_bytes);
+ if (msg->in_bytes < msg->iv_bytes)
+ break;
+ /* The iv_bytes has been checked and it is not greater than AES_BLOCK_SIZE. */
+ for (i = 0; i < msg->iv_bytes; i++)
+ msg->iv[i] = *((__u8 *)msg->in + msg->in_bytes - msg->iv_bytes + i) ^
+ *((__u8 *)msg->out + msg->out_bytes - msg->iv_bytes + i);
break;
case WD_CIPHER_CTR:
- ctr_iv_inc(msg->iv, msg->iv_bytes >>
- CTR_MODE_LEN_SHIFT);
+ ctr_iv_inc(msg->iv, msg->in_bytes >> CTR_MODE_LEN_SHIFT);
break;
default:
break;
@@ -764,8 +768,16 @@ static void update_iv(struct wd_cipher_msg *msg)
static void update_iv_sgl(struct wd_cipher_msg *msg)
{
+ __u8 out[AES_BLOCK_SIZE] = {0};
+ __u8 in[AES_BLOCK_SIZE] = {0};
+ __u8 i;
+
switch (msg->mode) {
case WD_CIPHER_CBC:
+ case WD_CIPHER_CBC_CS1:
+ case WD_CIPHER_CBC_CS2:
+ case WD_CIPHER_CBC_CS3:
+ case WD_CIPHER_CFB:
if (msg->op_type == WD_CIPHER_ENCRYPTION &&
msg->out_bytes >= msg->iv_bytes)
hisi_qm_sgl_copy(msg->iv, msg->out,
@@ -780,16 +792,20 @@ static void update_iv_sgl(struct wd_cipher_msg *msg)
break;
case WD_CIPHER_OFB:
- case WD_CIPHER_CFB:
- if (msg->out_bytes >= msg->iv_bytes)
- hisi_qm_sgl_copy(msg->iv, msg->out,
+ /* The iv_bytes has been checked and it is not greater than AES_BLOCK_SIZE. */
+ if (msg->in_bytes >= msg->iv_bytes) {
+ hisi_qm_sgl_copy(in, msg->in,
+ msg->in_bytes - msg->iv_bytes,
+ msg->iv_bytes, COPY_SGL_TO_PBUFF);
+ hisi_qm_sgl_copy(out, msg->out,
msg->out_bytes - msg->iv_bytes,
msg->iv_bytes, COPY_SGL_TO_PBUFF);
-
+ for (i = 0; i < msg->iv_bytes; i++)
+ msg->iv[i] = *(in + i) ^ *(out + i);
+ }
break;
case WD_CIPHER_CTR:
- ctr_iv_inc(msg->iv, msg->iv_bytes >>
- CTR_MODE_LEN_SHIFT);
+ ctr_iv_inc(msg->iv, msg->in_bytes >> CTR_MODE_LEN_SHIFT);
break;
default:
break;
diff --git a/wd_cipher.c b/wd_cipher.c
index ec6fb15..0e5de25 100644
--- a/wd_cipher.c
+++ b/wd_cipher.c
@@ -646,6 +646,12 @@ static int wd_cipher_check_params(handle_t h_sess,
return -WD_EINVAL;
}
+ if (unlikely(req->in_bytes != req->out_bytes)) {
+ WD_ERR("cipher set out_bytes is error, size = %u\n",
+ req->out_bytes);
+ return -WD_EINVAL;
+ }
+
ret = cipher_in_len_check(h_sess, req);
if (unlikely(ret))
return ret;
--
2.25.1

143
0030-uadk-v1-fix-for-cipher-update-iv.patch Normal file
View File

@ -0,0 +1,143 @@
From 4a66322e7be478c48b2ebcb2104fec114d37cd7b Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Fri, 11 Oct 2024 11:31:23 +0800
Subject: [PATCH 30/39] uadk/v1: fix for cipher update iv
The cipher iv is incorrectly updated, as a result, the uadk
fails to encrypt data. The CFB, OFB mode are modified
according to the algorithm protocol. BD2 does not support
the ofb mode, it works with cipher_ofb_data_handle, so it
still uses the old way to update iv.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_sec_udrv.c | 80 +++++++++++++++++++++++++++++++++---------
1 file changed, 63 insertions(+), 17 deletions(-)
diff --git a/v1/drv/hisi_sec_udrv.c b/v1/drv/hisi_sec_udrv.c
index ac6df5f..2c7ca20 100644
--- a/v1/drv/hisi_sec_udrv.c
+++ b/v1/drv/hisi_sec_udrv.c
@@ -253,30 +253,76 @@ static void update_iv_from_res(__u8 *dst, __u8 *src, size_t offset, __u16 bytes,
}
}
-static void update_iv(struct wcrypto_cipher_msg *msg)
+static int update_iv_ofb(struct wcrypto_cipher_msg *msg, size_t offset)
{
+ __u8 out[AES_BLOCK_SIZE] = {0};
+ __u8 in[AES_BLOCK_SIZE] = {0};
+ __u8 iv[AES_BLOCK_SIZE] = {0};
+ int ret;
+ __u8 i;
+
+ /* The iv_bytes is not greater than AES_BLOCK_SIZE. */
+ if (msg->data_fmt == WD_SGL_BUF) {
+ ret = wd_sgl_cp_to_pbuf((struct wd_sgl *)msg->out, offset,
+ (void *)out, msg->iv_bytes);
+ if (unlikely(ret))
+ return ret;
+ ret = wd_sgl_cp_to_pbuf((struct wd_sgl *)msg->in, offset,
+ (void *)in, msg->iv_bytes);
+ if (unlikely(ret))
+ return ret;
+ for (i = 0; i < msg->iv_bytes; i++)
+ iv[i] = in[i] ^ out[i];
+
+ return wd_sgl_cp_from_pbuf((struct wd_sgl *)msg->iv, 0,
+ (void *)iv, msg->iv_bytes);
+ }
+
+ for (i = 0; i < msg->iv_bytes; i++)
+ msg->iv[i] = *((__u8 *)msg->in + offset + i) ^
+ *((__u8 *)msg->out + offset + i);
+
+ return 0;
+}
+
+static void update_iv(struct wcrypto_cipher_msg *msg, int bd_type)
+{
+ size_t offset;
+ int ret;
+
switch (msg->mode) {
case WCRYPTO_CIPHER_CBC:
case WCRYPTO_CIPHER_CBC_CS1:
case WCRYPTO_CIPHER_CBC_CS2:
case WCRYPTO_CIPHER_CBC_CS3:
- if (msg->op_type == WCRYPTO_CIPHER_ENCRYPTION &&
- msg->out_bytes >= msg->iv_bytes)
- update_iv_from_res(msg->iv, msg->out,
- msg->out_bytes - msg->iv_bytes,
+ case WCRYPTO_CIPHER_CFB:
+ /* The out_bytes is equal to the in_bytes. */
+ if (msg->out_bytes < msg->iv_bytes)
+ break;
+
+ offset = msg->out_bytes - msg->iv_bytes;
+ if (msg->op_type == WCRYPTO_CIPHER_ENCRYPTION)
+ update_iv_from_res(msg->iv, msg->out, offset,
msg->iv_bytes, msg->data_fmt);
- if (msg->op_type == WCRYPTO_CIPHER_DECRYPTION &&
- msg->in_bytes >= msg->iv_bytes)
- update_iv_from_res(msg->iv, msg->in,
- msg->in_bytes - msg->iv_bytes,
+ else
+ update_iv_from_res(msg->iv, msg->in, offset,
msg->iv_bytes, msg->data_fmt);
break;
case WCRYPTO_CIPHER_OFB:
- case WCRYPTO_CIPHER_CFB:
- if (msg->out_bytes >= msg->iv_bytes)
- update_iv_from_res(msg->iv, msg->out,
- msg->out_bytes - msg->iv_bytes,
+ /* The out_bytes is equal to the in_bytes. */
+ if (msg->out_bytes < msg->iv_bytes)
+ break;
+
+ offset = msg->out_bytes - msg->iv_bytes;
+ /* BD2 does not support the ofb mode, it works with cipher_ofb_data_handle. */
+ if (bd_type == BD_TYPE2) {
+ update_iv_from_res(msg->iv, msg->out, offset,
msg->iv_bytes, msg->data_fmt);
+ } else if (bd_type == BD_TYPE3) {
+ ret = update_iv_ofb(msg, offset);
+ if (unlikely(ret))
+ WD_ERR("failed to update ofb iv!\n");
+ }
break;
case WCRYPTO_CIPHER_CTR:
ctr_iv_inc(msg->iv, msg->in_bytes >> CTR_MODE_LEN_SHIFT,
@@ -680,8 +726,8 @@ static int cipher_param_check(struct wcrypto_cipher_msg *msg)
int ret;
if (unlikely(msg->in_bytes > MAX_CIPHER_LENGTH ||
- !msg->in_bytes)) {
- WD_ERR("input cipher len is too large!\n");
+ !msg->in_bytes || msg->in_bytes != msg->out_bytes)) {
+ WD_ERR("failed to check input cipher len(%u)!\n", msg->in_bytes);
return -WD_EINVAL;
}
@@ -1849,7 +1895,7 @@ static void parse_cipher_bd2(struct wd_queue *q, struct hisi_sec_sqe *sqe,
sqe->type2.c_ivin_addr_l, sqe->type2.c_ivin_addr_h,
cipher_msg->data_fmt);
- update_iv(cipher_msg);
+ update_iv(cipher_msg, BD_TYPE2);
if (cipher_msg->mode == WCRYPTO_CIPHER_OFB)
cipher_ofb_data_handle(cipher_msg);
@@ -1883,7 +1929,7 @@ static void parse_cipher_bd3(struct wd_queue *q, struct hisi_sec_bd3_sqe *sqe,
sqe->ipsec_scene.c_ivin_addr_h,
cipher_msg->data_fmt);
- update_iv(cipher_msg);
+ update_iv(cipher_msg, BD_TYPE3);
}
/*
--
2.25.1

126
0031-uadk-reduce-the-print-rating-of-specific-logs.patch Normal file
View File

@ -0,0 +1,126 @@
From c103303271a64066c38ae6ada5d68a789e39949a Mon Sep 17 00:00:00 2001
From: Chenghai Huang <huangchenghai2@huawei.com>
Date: Sat, 12 Oct 2024 11:02:15 +0800
Subject: [PATCH 31/39] uadk - reduce the print rating of specific logs
Reduce the frequency of printing error logs when the status
is 0xe for avoid a large amount of printed information.
Signed-off-by: Chenghai Huang <huangchenghai2@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_comp.c | 11 +++++++++--
v1/drv/hisi_zip_udrv.c | 40 ++++++++++++++++++++++++++++++++++++----
2 files changed, 45 insertions(+), 6 deletions(-)
diff --git a/drv/hisi_comp.c b/drv/hisi_comp.c
index b4c216f..07d8754 100644
--- a/drv/hisi_comp.c
+++ b/drv/hisi_comp.c
@@ -29,6 +29,9 @@
#define ZSTD_MAX_SIZE (1 << 17)
+/* Error status 0xe indicates that dest_avail_out insufficient */
+#define ERR_DSTLEN_OUT 0xe
+
#define swab32(x) \
((((x) & 0x000000ff) << 24) | \
(((x) & 0x0000ff00) << 8) | \
@@ -1039,8 +1042,12 @@ static int parse_zip_sqe(struct hisi_qp *qp, struct hisi_zip_sqe *sqe,
if (unlikely(status != 0 && status != HZ_NEGACOMPRESS &&
status != HZ_CRC_ERR && status != HZ_DECOMP_END)) {
- WD_ERR("bad request(ctx_st = 0x%x, status = 0x%x, algorithm type = %u)!\n",
- ctx_st, status, type);
+ if (status == ERR_DSTLEN_OUT)
+ WD_DEBUG("bad request(ctx_st=0x%x, status=0x%x, algorithm type=%u)!\n",
+ ctx_st, status, type);
+ else
+ WD_ERR("bad request(ctx_st=0x%x, status=0x%x, algorithm type=%u)!\n",
+ ctx_st, status, type);
recv_msg->req.status = WD_IN_EPARA;
}
diff --git a/v1/drv/hisi_zip_udrv.c b/v1/drv/hisi_zip_udrv.c
index 01d76a3..8497ebc 100644
--- a/v1/drv/hisi_zip_udrv.c
+++ b/v1/drv/hisi_zip_udrv.c
@@ -26,6 +26,7 @@
#include <sys/ioctl.h>
#include <sys/epoll.h>
#include <sys/eventfd.h>
+#include <sys/wait.h>
#include <sys/types.h>
#include "v1/wd_util.h"
#include "v1/wd_comp.h"
@@ -57,6 +58,10 @@
#define ZSTD_FREQ_DATA_SIZE 784
#define REPCODE_SIZE 12
+/* Error status 0xe indicates that dest_avail_out insufficient */
+#define ERR_DSTLEN_OUT 0xe
+#define PRINT_TIME_INTERVAL 21600
+
#define CTX_PRIV1_OFFSET 4
#define CTX_PRIV2_OFFSET 8
#define CTX_REPCODE1_OFFSET 12
@@ -95,6 +100,35 @@ struct zip_fill_sqe_ops {
void (*fill_sqe_hw_info)(void *ssqe, struct wcrypto_comp_msg *msg);
};
+static unsigned int g_err_print_enable = 1;
+
+static void zip_err_print_alarm_end(int sig)
+{
+ if (sig == SIGALRM) {
+ g_err_print_enable = 1;
+ alarm(0);
+ }
+}
+
+static void zip_err_print_time_start(void)
+{
+ g_err_print_enable = 0;
+ signal(SIGALRM, zip_err_print_alarm_end);
+ alarm(PRINT_TIME_INTERVAL);
+}
+
+static void zip_err_bd_print(__u16 ctx_st, __u32 status, __u32 type)
+{
+ if (status != ERR_DSTLEN_OUT) {
+ WD_ERR("bad status(ctx_st=0x%x, s=0x%x, t=%u)\n",
+ ctx_st, status, type);
+ } else if (g_err_print_enable == 1) {
+ WD_ERR("bad status(ctx_st=0x%x, s=0x%x, t=%u)\n",
+ ctx_st, status, type);
+ zip_err_print_time_start();
+ }
+}
+
static int fill_zip_comp_alg_v1(struct hisi_zip_sqe *sqe,
struct wcrypto_comp_msg *msg)
{
@@ -274,8 +308,7 @@ int qm_parse_zip_sqe(void *hw_msg, const struct qm_queue_info *info,
if (status != 0 && status != HW_NEGACOMPRESS &&
status != HW_CRC_ERR && status != HW_DECOMP_END) {
- WD_ERR("bad status(ctx_st=0x%x, s=0x%x, t=%u)\n",
- ctx_st, status, type);
+ zip_err_bd_print(ctx_st, status, type);
recv_msg->status = WD_IN_EPARA;
} else {
recv_msg->status = 0;
@@ -707,8 +740,7 @@ int qm_parse_zip_sqe_v3(void *hw_msg, const struct qm_queue_info *info,
return 0;
if (status != 0 && status != HW_NEGACOMPRESS && status != HW_DECOMP_END) {
- WD_ERR("bad status(ctx_st=0x%x, s=0x%x, t=%u)\n",
- ctx_st, status, type);
+ zip_err_bd_print(ctx_st, status, type);
recv_msg->status = WD_IN_EPARA;
} else {
recv_msg->status = 0;
--
2.25.1

288
0032-Revert-uadk-v1-replace-wd_spinlock-to-pthread_spin_l.patch Normal file
View File

@ -0,0 +1,288 @@
From ff746e0ed02fdd0f547b4e62d89377efba7f9302 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 12 Oct 2024 11:03:18 +0800
Subject: [PATCH 32/39] Revert "uadk/v1: replace wd_spinlock to
pthread_spin_lock"
This reverts commit f7c2a7a3e5116dc0ce4af539070f2ed93bb18af8.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_qm_udrv.c | 51 +++++++++++++-----------------------------
v1/drv/hisi_qm_udrv.h | 4 ++--
v1/drv/hisi_rng_udrv.c | 25 ++++++---------------
v1/drv/hisi_rng_udrv.h | 2 +-
4 files changed, 26 insertions(+), 56 deletions(-)
diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c
index 1d4f1d8..175a5c4 100644
--- a/v1/drv/hisi_qm_udrv.c
+++ b/v1/drv/hisi_qm_udrv.c
@@ -20,7 +20,6 @@
#include <sys/mman.h>
#include <string.h>
#include <stdint.h>
-#include <pthread.h>
#include <sys/ioctl.h>
#include <sys/epoll.h>
#include <sys/eventfd.h>
@@ -459,11 +458,6 @@ static int qm_init_queue_info(struct wd_queue *q)
struct hisi_qp_ctx qp_ctx = {0};
int ret;
- if (!info->sqe_size) {
- WD_ERR("invalid: sqe size is 0!\n");
- return -WD_EINVAL;
- }
-
info->sq_tail_index = 0;
info->cq_head_index = 0;
info->cqc_phase = 1;
@@ -508,6 +502,11 @@ static int qm_set_queue_info(struct wd_queue *q)
ret = qm_set_queue_regions(q);
if (ret)
return -WD_EINVAL;
+ if (!info->sqe_size) {
+ WD_ERR("sqe size =%d err!\n", info->sqe_size);
+ ret = -WD_EINVAL;
+ goto err_with_regions;
+ }
info->cq_base = (void *)((uintptr_t)info->sq_base +
info->sqe_size * info->sq_depth);
@@ -535,24 +534,8 @@ static int qm_set_queue_info(struct wd_queue *q)
goto err_with_regions;
}
- ret = pthread_spin_init(&info->sd_lock, PTHREAD_PROCESS_PRIVATE);
- if (ret) {
- WD_ERR("failed to init qinfo sd_lock!\n");
- goto free_cache;
- }
-
- ret = pthread_spin_init(&info->rc_lock, PTHREAD_PROCESS_PRIVATE);
- if (ret) {
- WD_ERR("failed to init qinfo rc_lock!\n");
- goto uninit_lock;
- }
-
return 0;
-uninit_lock:
- pthread_spin_destroy(&info->sd_lock);
-free_cache:
- free(info->req_cache);
err_with_regions:
qm_unset_queue_regions(q);
return ret;
@@ -593,10 +576,8 @@ void qm_uninit_queue(struct wd_queue *q)
struct q_info *qinfo = q->qinfo;
struct qm_queue_info *info = qinfo->priv;
- pthread_spin_destroy(&info->rc_lock);
- pthread_spin_destroy(&info->sd_lock);
- free(info->req_cache);
qm_unset_queue_regions(q);
+ free(info->req_cache);
free(qinfo->priv);
qinfo->priv = NULL;
}
@@ -624,10 +605,10 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
int ret;
__u32 i;
- pthread_spin_lock(&info->sd_lock);
+ wd_spinlock(&info->sd_lock);
if (unlikely((__u32)__atomic_load_n(&info->used, __ATOMIC_RELAXED) >
info->sq_depth - num - 1)) {
- pthread_spin_unlock(&info->sd_lock);
+ wd_unspinlock(&info->sd_lock);
WD_ERR("queue is full!\n");
return -WD_EBUSY;
}
@@ -636,7 +617,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
ret = info->sqe_fill[qinfo->atype](req[i], qinfo->priv,
info->sq_tail_index);
if (unlikely(ret != WD_SUCCESS)) {
- pthread_spin_unlock(&info->sd_lock);
+ wd_unspinlock(&info->sd_lock);
WD_ERR("sqe fill error, ret %d!\n", ret);
return -WD_EINVAL;
}
@@ -648,7 +629,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
}
ret = qm_tx_update(info, num);
- pthread_spin_unlock(&info->sd_lock);
+ wd_unspinlock(&info->sd_lock);
return ret;
}
@@ -681,9 +662,9 @@ static int check_ds_rx_base(struct qm_queue_info *info,
return 0;
if (before) {
- pthread_spin_lock(&info->rc_lock);
+ wd_spinlock(&info->rc_lock);
qm_rx_from_cache(info, resp, num);
- pthread_spin_unlock(&info->rc_lock);
+ wd_unspinlock(&info->rc_lock);
WD_ERR("wd queue hw error happened before qm receive!\n");
} else {
WD_ERR("wd queue hw error happened after qm receive!\n");
@@ -724,7 +705,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
if (unlikely(ret))
return ret;
- pthread_spin_lock(&info->rc_lock);
+ wd_spinlock(&info->rc_lock);
for (i = 0; i < num; i++) {
cqe = info->cq_base + info->cq_head_index * sizeof(struct cqe);
if (info->cqc_phase != CQE_PHASE(cqe))
@@ -733,7 +714,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
mb(); /* make sure the data is all in memory before read */
sq_head = CQE_SQ_HEAD_INDEX(cqe);
if (unlikely(sq_head >= info->sq_depth)) {
- pthread_spin_unlock(&info->rc_lock);
+ wd_unspinlock(&info->rc_lock);
WD_ERR("CQE_SQ_HEAD_INDEX(%u) error\n", sq_head);
return -WD_EIO;
}
@@ -745,7 +726,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
if (!ret) {
break;
} else if (ret < 0) {
- pthread_spin_unlock(&info->rc_lock);
+ wd_unspinlock(&info->rc_lock);
WD_ERR("recv sqe error %u\n", sq_head);
return ret;
}
@@ -766,7 +747,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
ret = i;
}
- pthread_spin_unlock(&info->rc_lock);
+ wd_unspinlock(&info->rc_lock);
return ret;
}
diff --git a/v1/drv/hisi_qm_udrv.h b/v1/drv/hisi_qm_udrv.h
index 06ac66a..4d54cf6 100644
--- a/v1/drv/hisi_qm_udrv.h
+++ b/v1/drv/hisi_qm_udrv.h
@@ -166,8 +166,8 @@ struct qm_queue_info {
qm_sqe_parse sqe_parse[WCRYPTO_MAX_ALG];
hisi_qm_sqe_fill_priv sqe_fill_priv;
hisi_qm_sqe_parse_priv sqe_parse_priv;
- pthread_spinlock_t sd_lock;
- pthread_spinlock_t rc_lock;
+ struct wd_lock sd_lock;
+ struct wd_lock rc_lock;
struct wd_queue *q;
int (*sgl_info)(struct hw_sgl_info *info);
int (*sgl_init)(void *pool, struct wd_sgl *sgl);
diff --git a/v1/drv/hisi_rng_udrv.c b/v1/drv/hisi_rng_udrv.c
index 605ef27..86a20cb 100644
--- a/v1/drv/hisi_rng_udrv.c
+++ b/v1/drv/hisi_rng_udrv.c
@@ -17,7 +17,6 @@
#include <stdlib.h>
#include <unistd.h>
#include <stdio.h>
-#include <pthread.h>
#include <sys/mman.h>
#include <string.h>
#include <stdint.h>
@@ -35,7 +34,6 @@ int rng_init_queue(struct wd_queue *q)
{
struct q_info *qinfo = q->qinfo;
struct rng_queue_info *info;
- int ret;
info = calloc(1, sizeof(*info));
if (!info) {
@@ -43,20 +41,12 @@ int rng_init_queue(struct wd_queue *q)
return -ENOMEM;
}
- ret = pthread_spin_init(&info->lock, PTHREAD_PROCESS_PRIVATE);
- if (ret) {
- free(info);
- WD_ERR("failed to init rng qinfo lock!\n");
- return ret;
- }
-
qinfo->priv = info;
info->mmio_base = wd_drv_mmap_qfr(q, WD_UACCE_QFRT_MMIO, 0);
if (info->mmio_base == MAP_FAILED) {
info->mmio_base = NULL;
+ free(qinfo->priv);
qinfo->priv = NULL;
- pthread_spin_destroy(&info->lock);
- free(info);
WD_ERR("mmap trng mmio fail\n");
return -ENOMEM;
}
@@ -73,7 +63,6 @@ void rng_uninit_queue(struct wd_queue *q)
free(qinfo->priv);
qinfo->priv = NULL;
- pthread_spin_destroy(&info->lock);
}
int rng_send(struct wd_queue *q, void **req, __u32 num)
@@ -81,14 +70,14 @@ int rng_send(struct wd_queue *q, void **req, __u32 num)
struct q_info *qinfo = q->qinfo;
struct rng_queue_info *info = qinfo->priv;
- pthread_spin_lock(&info->lock);
+ wd_spinlock(&info->lock);
if (!info->req_cache[info->send_idx]) {
info->req_cache[info->send_idx] = req[0];
info->send_idx++;
- pthread_spin_unlock(&info->lock);
+ wd_unspinlock(&info->lock);
return 0;
}
- pthread_spin_unlock(&info->lock);
+ wd_unspinlock(&info->lock);
WD_ERR("queue is full!\n");
return -WD_EBUSY;
@@ -139,16 +128,16 @@ int rng_recv(struct wd_queue *q, void **resp, __u32 num)
struct wcrypto_cb_tag *tag;
__u32 currsize = 0;
- pthread_spin_lock(&info->lock);
+ wd_spinlock(&info->lock);
msg = info->req_cache[info->recv_idx];
if (!msg) {
- pthread_spin_unlock(&info->lock);
+ wd_unspinlock(&info->lock);
return 0;
}
info->req_cache[info->recv_idx] = NULL;
info->recv_idx++;
- pthread_spin_unlock(&info->lock);
+ wd_unspinlock(&info->lock);
tag = (void *)(uintptr_t)msg->usr_tag;
if (usr && tag->ctx_id != usr)
diff --git a/v1/drv/hisi_rng_udrv.h b/v1/drv/hisi_rng_udrv.h
index 3efa10e..56814a4 100644
--- a/v1/drv/hisi_rng_udrv.h
+++ b/v1/drv/hisi_rng_udrv.h
@@ -29,7 +29,7 @@ struct rng_queue_info {
void *req_cache[TRNG_Q_DEPTH];
__u8 send_idx;
__u8 recv_idx;
- pthread_spinlock_t lock;
+ struct wd_lock lock;
};
int rng_init_queue(struct wd_queue *q);
--
2.25.1

194
0033-Revert-uadk-v1-check-queue-status-before-sending-doo.patch Normal file
View File

@ -0,0 +1,194 @@
From 304509683bf91f0457e63d56fa3b497b66926df0 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 12 Oct 2024 11:07:33 +0800
Subject: [PATCH 33/39] Revert "uadk/v1: check queue status before sending
doorbells"
This reverts commit afc1082d85c6cdac7d3eaaac8130ffb5fa39b138.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_hpre_udrv.c | 10 +++----
v1/drv/hisi_qm_udrv.c | 60 ++++++++++++++++-------------------------
v1/drv/hisi_qm_udrv.h | 4 +--
v1/wd_util.h | 8 +++++-
4 files changed, 36 insertions(+), 46 deletions(-)
diff --git a/v1/drv/hisi_hpre_udrv.c b/v1/drv/hisi_hpre_udrv.c
index 05518ab..5832e9a 100644
--- a/v1/drv/hisi_hpre_udrv.c
+++ b/v1/drv/hisi_hpre_udrv.c
@@ -1930,10 +1930,10 @@ static int fill_sm2_enc_sqe(void *msg, struct qm_queue_info *info, __u16 idx)
goto fail_fill_sqe;
}
+ /* make sure the request is all in memory before doorbell */
+ mb();
info->sq_tail_index = i;
- ret = qm_tx_update(info, 1);
- if (unlikely(ret))
- goto fail_fill_sqe;
+ qm_tx_update(info, 1);
return ret;
@@ -2083,9 +2083,7 @@ static int parse_first_sqe(void *hw_msg, struct qm_queue_info *info, __u16 idx,
WD_ERR("first BD error = %u\n", msg->result);
info->cq_head_index = i;
- ret = qm_rx_update(info, 1);
- if (unlikely(ret))
- return ret;
+ qm_rx_update(info, 1);
return 1;
}
diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c
index 175a5c4..ea4b199 100644
--- a/v1/drv/hisi_qm_udrv.c
+++ b/v1/drv/hisi_qm_udrv.c
@@ -582,20 +582,10 @@ void qm_uninit_queue(struct wd_queue *q)
qinfo->priv = NULL;
}
-int qm_tx_update(struct qm_queue_info *info, __u32 num)
+void qm_tx_update(struct qm_queue_info *info, __u32 num)
{
- if (unlikely(wd_reg_read(info->ds_tx_base) == 1)) {
- WD_ERR("wd queue hw error happened before qm send!\n");
- return -WD_HW_EACCESS;
- }
-
- /* make sure the request is all in memory before doorbell */
- mb();
-
info->db(info, DOORBELL_CMD_SQ, info->sq_tail_index, 0);
__atomic_add_fetch(&info->used, num, __ATOMIC_RELAXED);
-
- return WD_SUCCESS;
}
int qm_send(struct wd_queue *q, void **req, __u32 num)
@@ -605,6 +595,11 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
int ret;
__u32 i;
+ if (unlikely(wd_reg_read(info->ds_tx_base) == 1)) {
+ WD_ERR("wd queue hw error happened before qm send!\n");
+ return -WD_HW_EACCESS;
+ }
+
wd_spinlock(&info->sd_lock);
if (unlikely((__u32)__atomic_load_n(&info->used, __ATOMIC_RELAXED) >
info->sq_depth - num - 1)) {
@@ -628,10 +623,19 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
info->sq_tail_index++;
}
- ret = qm_tx_update(info, num);
+ /* make sure the request is all in memory before doorbell */
+ mb();
+ qm_tx_update(info, num);
wd_unspinlock(&info->sd_lock);
- return ret;
+ return WD_SUCCESS;
+}
+
+void qm_rx_update(struct qm_queue_info *info, __u32 num)
+{
+ /* set c_flag to enable interrupt when use poll */
+ info->db(info, DOORBELL_CMD_CQ, info->cq_head_index, info->is_poll);
+ __atomic_sub_fetch(&info->used, num, __ATOMIC_RELAXED);
}
void qm_rx_from_cache(struct qm_queue_info *info, void **resp, __u32 num)
@@ -673,24 +677,6 @@ static int check_ds_rx_base(struct qm_queue_info *info,
return -WD_HW_EACCESS;
}
-int qm_rx_update(struct qm_queue_info *info, __u32 num)
-{
- int ret;
-
- ret = check_ds_rx_base(info, NULL, 0, 0);
- if (unlikely(ret))
- return ret;
-
- /* make sure queue status check is complete. */
- rmb();
-
- /* set c_flag to enable interrupt when use poll */
- info->db(info, DOORBELL_CMD_CQ, info->cq_head_index, info->is_poll);
- __atomic_sub_fetch(&info->used, num, __ATOMIC_RELAXED);
-
- return WD_SUCCESS;
-}
-
int qm_recv(struct wd_queue *q, void **resp, __u32 num)
{
struct q_info *qinfo = q->qinfo;
@@ -741,15 +727,15 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
}
}
- if (i) {
- ret = qm_rx_update(info, i);
- if (!ret)
- ret = i;
- }
+ if (i)
+ qm_rx_update(info, i);
wd_unspinlock(&info->rc_lock);
+ ret = check_ds_rx_base(info, resp, num, 0);
+ if (unlikely(ret))
+ return ret;
- return ret;
+ return i;
}
static int hw_type_check(struct wd_queue *q, const char *hw_type)
diff --git a/v1/drv/hisi_qm_udrv.h b/v1/drv/hisi_qm_udrv.h
index 4d54cf6..542d20d 100644
--- a/v1/drv/hisi_qm_udrv.h
+++ b/v1/drv/hisi_qm_udrv.h
@@ -191,8 +191,8 @@ int qm_init_hwsgl_mem(struct wd_queue *q, void *pool, struct wd_sgl *sgl);
int qm_uninit_hwsgl_mem(struct wd_queue *q, void *pool, struct wd_sgl *sgl);
int qm_merge_hwsgl(struct wd_queue *q, void *pool,
struct wd_sgl *dst_sgl, struct wd_sgl *src_sgl);
-int qm_tx_update(struct qm_queue_info *info, __u32 num);
-int qm_rx_update(struct qm_queue_info *info, __u32 num);
+void qm_tx_update(struct qm_queue_info *info, __u32 num);
+void qm_rx_update(struct qm_queue_info *info, __u32 num);
void qm_rx_from_cache(struct qm_queue_info *info, void **resp, __u32 num);
#define HISI_QM_API_VER_BASE "hisi_qm_v1"
diff --git a/v1/wd_util.h b/v1/wd_util.h
index 21137d2..9180fc1 100644
--- a/v1/wd_util.h
+++ b/v1/wd_util.h
@@ -383,11 +383,17 @@ struct wcrypto_ecc_out {
static inline void wd_reg_write(void *reg_addr, uint32_t value)
{
*((uint32_t *)reg_addr) = value;
+ wmb(); /* load fence */
}
static inline uint32_t wd_reg_read(void *reg_addr)
{
- return *((uint32_t *)reg_addr);
+ uint32_t temp;
+
+ temp = *((uint32_t *)reg_addr);
+ rmb(); /* load fence */
+
+ return temp;
}
void wd_spinlock(struct wd_lock *lock);
--
2.25.1

39
0034-uadk-v1-not-check-hardware-status-when-BD-not-proces.patch Normal file
View File

@ -0,0 +1,39 @@
From a2904158df65b9af7a85ff0af94cad81df164231 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 12 Oct 2024 11:11:27 +0800
Subject: [PATCH 34/39] uadk/v1: not check hardware status when BD not
processed
If the CQE status is not updated during packet receiving,
the hardware has not processed the packet. In this case,
0 can be returned without checking the hardware status.
If a fault occurs, the hardware status will be checked
when the user attempts to receive packets next time.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_qm_udrv.c | 6 +++++-
1 file changed, 5 insertions(+), 1 deletion(-)
diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c
index ea4b199..731492b 100644
--- a/v1/drv/hisi_qm_udrv.c
+++ b/v1/drv/hisi_qm_udrv.c
@@ -727,8 +727,12 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
}
}
- if (i)
+ if (i) {
qm_rx_update(info, i);
+ } else {
+ wd_unspinlock(&info->rc_lock);
+ return 0;
+ }
wd_unspinlock(&info->rc_lock);
ret = check_ds_rx_base(info, resp, num, 0);
--
2.25.1

215
0035-uadk-v1-check-queue-status-before-sending-doorbells.patch Normal file
View File

@ -0,0 +1,215 @@
From 62f8f743652212ed6e56c9d81b6cb9ae23b2be92 Mon Sep 17 00:00:00 2001
From: Weili Qian <qianweili@huawei.com>
Date: Sat, 12 Oct 2024 11:12:43 +0800
Subject: [PATCH 35/39] uadk/v1: check queue status before sending doorbells
When the device needs to be reset, the queue status is
set to disable before resetting. The user process checks
the queue status before sending the doorbell. If the queue
is disable, the user process returns failure.
Currently, the task execution order in user mode is as follows:
1. check the queue status.
2. fill in or parse the BD.
3. send the doorbell to the hardware.
To reduce the possibility of sending doorbells during reset,
the task execution order is modified as follows:
1. fill in or parse the BD.
2. check the queue status.
3. send the doorbell to the hardware.
In addition, a rmb() is added before the doorbell is
sent to ensure that the queue status check is complete.
rmb() and wmb() can be replaced by mb() in hisi_qm_send().
Therefore, the barrier on the wd_reg_read() and wd_reg_write()
can be deleted.
Signed-off-by: Weili Qian <qianweili@huawei.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_hpre_udrv.c | 10 ++++---
v1/drv/hisi_qm_udrv.c | 60 ++++++++++++++++++++++++-----------------
v1/drv/hisi_qm_udrv.h | 4 +--
v1/wd_util.h | 8 +-----
4 files changed, 44 insertions(+), 38 deletions(-)
diff --git a/v1/drv/hisi_hpre_udrv.c b/v1/drv/hisi_hpre_udrv.c
index 5832e9a..05518ab 100644
--- a/v1/drv/hisi_hpre_udrv.c
+++ b/v1/drv/hisi_hpre_udrv.c
@@ -1930,10 +1930,10 @@ static int fill_sm2_enc_sqe(void *msg, struct qm_queue_info *info, __u16 idx)
goto fail_fill_sqe;
}
- /* make sure the request is all in memory before doorbell */
- mb();
info->sq_tail_index = i;
- qm_tx_update(info, 1);
+ ret = qm_tx_update(info, 1);
+ if (unlikely(ret))
+ goto fail_fill_sqe;
return ret;
@@ -2083,7 +2083,9 @@ static int parse_first_sqe(void *hw_msg, struct qm_queue_info *info, __u16 idx,
WD_ERR("first BD error = %u\n", msg->result);
info->cq_head_index = i;
- qm_rx_update(info, 1);
+ ret = qm_rx_update(info, 1);
+ if (unlikely(ret))
+ return ret;
return 1;
}
diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c
index 731492b..175a5c4 100644
--- a/v1/drv/hisi_qm_udrv.c
+++ b/v1/drv/hisi_qm_udrv.c
@@ -582,10 +582,20 @@ void qm_uninit_queue(struct wd_queue *q)
qinfo->priv = NULL;
}
-void qm_tx_update(struct qm_queue_info *info, __u32 num)
+int qm_tx_update(struct qm_queue_info *info, __u32 num)
{
+ if (unlikely(wd_reg_read(info->ds_tx_base) == 1)) {
+ WD_ERR("wd queue hw error happened before qm send!\n");
+ return -WD_HW_EACCESS;
+ }
+
+ /* make sure the request is all in memory before doorbell */
+ mb();
+
info->db(info, DOORBELL_CMD_SQ, info->sq_tail_index, 0);
__atomic_add_fetch(&info->used, num, __ATOMIC_RELAXED);
+
+ return WD_SUCCESS;
}
int qm_send(struct wd_queue *q, void **req, __u32 num)
@@ -595,11 +605,6 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
int ret;
__u32 i;
- if (unlikely(wd_reg_read(info->ds_tx_base) == 1)) {
- WD_ERR("wd queue hw error happened before qm send!\n");
- return -WD_HW_EACCESS;
- }
-
wd_spinlock(&info->sd_lock);
if (unlikely((__u32)__atomic_load_n(&info->used, __ATOMIC_RELAXED) >
info->sq_depth - num - 1)) {
@@ -623,19 +628,10 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
info->sq_tail_index++;
}
- /* make sure the request is all in memory before doorbell */
- mb();
- qm_tx_update(info, num);
+ ret = qm_tx_update(info, num);
wd_unspinlock(&info->sd_lock);
- return WD_SUCCESS;
-}
-
-void qm_rx_update(struct qm_queue_info *info, __u32 num)
-{
- /* set c_flag to enable interrupt when use poll */
- info->db(info, DOORBELL_CMD_CQ, info->cq_head_index, info->is_poll);
- __atomic_sub_fetch(&info->used, num, __ATOMIC_RELAXED);
+ return ret;
}
void qm_rx_from_cache(struct qm_queue_info *info, void **resp, __u32 num)
@@ -677,6 +673,24 @@ static int check_ds_rx_base(struct qm_queue_info *info,
return -WD_HW_EACCESS;
}
+int qm_rx_update(struct qm_queue_info *info, __u32 num)
+{
+ int ret;
+
+ ret = check_ds_rx_base(info, NULL, 0, 0);
+ if (unlikely(ret))
+ return ret;
+
+ /* make sure queue status check is complete. */
+ rmb();
+
+ /* set c_flag to enable interrupt when use poll */
+ info->db(info, DOORBELL_CMD_CQ, info->cq_head_index, info->is_poll);
+ __atomic_sub_fetch(&info->used, num, __ATOMIC_RELAXED);
+
+ return WD_SUCCESS;
+}
+
int qm_recv(struct wd_queue *q, void **resp, __u32 num)
{
struct q_info *qinfo = q->qinfo;
@@ -728,18 +742,14 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
}
if (i) {
- qm_rx_update(info, i);
- } else {
- wd_unspinlock(&info->rc_lock);
- return 0;
+ ret = qm_rx_update(info, i);
+ if (!ret)
+ ret = i;
}
wd_unspinlock(&info->rc_lock);
- ret = check_ds_rx_base(info, resp, num, 0);
- if (unlikely(ret))
- return ret;
- return i;
+ return ret;
}
static int hw_type_check(struct wd_queue *q, const char *hw_type)
diff --git a/v1/drv/hisi_qm_udrv.h b/v1/drv/hisi_qm_udrv.h
index 542d20d..4d54cf6 100644
--- a/v1/drv/hisi_qm_udrv.h
+++ b/v1/drv/hisi_qm_udrv.h
@@ -191,8 +191,8 @@ int qm_init_hwsgl_mem(struct wd_queue *q, void *pool, struct wd_sgl *sgl);
int qm_uninit_hwsgl_mem(struct wd_queue *q, void *pool, struct wd_sgl *sgl);
int qm_merge_hwsgl(struct wd_queue *q, void *pool,
struct wd_sgl *dst_sgl, struct wd_sgl *src_sgl);
-void qm_tx_update(struct qm_queue_info *info, __u32 num);
-void qm_rx_update(struct qm_queue_info *info, __u32 num);
+int qm_tx_update(struct qm_queue_info *info, __u32 num);
+int qm_rx_update(struct qm_queue_info *info, __u32 num);
void qm_rx_from_cache(struct qm_queue_info *info, void **resp, __u32 num);
#define HISI_QM_API_VER_BASE "hisi_qm_v1"
diff --git a/v1/wd_util.h b/v1/wd_util.h
index 9180fc1..21137d2 100644
--- a/v1/wd_util.h
+++ b/v1/wd_util.h
@@ -383,17 +383,11 @@ struct wcrypto_ecc_out {
static inline void wd_reg_write(void *reg_addr, uint32_t value)
{
*((uint32_t *)reg_addr) = value;
- wmb(); /* load fence */
}
static inline uint32_t wd_reg_read(void *reg_addr)
{
- uint32_t temp;
-
- temp = *((uint32_t *)reg_addr);
- rmb(); /* load fence */
-
- return temp;
+ return *((uint32_t *)reg_addr);
}
void wd_spinlock(struct wd_lock *lock);
--
2.25.1

289
0036-uadk-v1-replace-wd_spinlock-to-pthread_spin_lock.patch Normal file
View File

@ -0,0 +1,289 @@
From 2ee2190cf494361a79fae68bd35a4c280026414e Mon Sep 17 00:00:00 2001
From: Wenkai Lin <linwenkai6@hisilicon.com>
Date: Sat, 12 Oct 2024 11:15:08 +0800
Subject: [PATCH 36/39] uadk/v1: replace wd_spinlock to pthread_spin_lock
Due to memory differences, using wd_spinlock may
cause synchronization problems, it is better to use
the standard pthread spin lock of glibc.
Signed-off-by: Wenkai Lin <linwenkai6@hisilicon.com>
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
v1/drv/hisi_qm_udrv.c | 51 +++++++++++++++++++++++++++++-------------
v1/drv/hisi_qm_udrv.h | 4 ++--
v1/drv/hisi_rng_udrv.c | 25 +++++++++++++++------
v1/drv/hisi_rng_udrv.h | 2 +-
4 files changed, 56 insertions(+), 26 deletions(-)
diff --git a/v1/drv/hisi_qm_udrv.c b/v1/drv/hisi_qm_udrv.c
index 175a5c4..1d4f1d8 100644
--- a/v1/drv/hisi_qm_udrv.c
+++ b/v1/drv/hisi_qm_udrv.c
@@ -20,6 +20,7 @@
#include <sys/mman.h>
#include <string.h>
#include <stdint.h>
+#include <pthread.h>
#include <sys/ioctl.h>
#include <sys/epoll.h>
#include <sys/eventfd.h>
@@ -458,6 +459,11 @@ static int qm_init_queue_info(struct wd_queue *q)
struct hisi_qp_ctx qp_ctx = {0};
int ret;
+ if (!info->sqe_size) {
+ WD_ERR("invalid: sqe size is 0!\n");
+ return -WD_EINVAL;
+ }
+
info->sq_tail_index = 0;
info->cq_head_index = 0;
info->cqc_phase = 1;
@@ -502,11 +508,6 @@ static int qm_set_queue_info(struct wd_queue *q)
ret = qm_set_queue_regions(q);
if (ret)
return -WD_EINVAL;
- if (!info->sqe_size) {
- WD_ERR("sqe size =%d err!\n", info->sqe_size);
- ret = -WD_EINVAL;
- goto err_with_regions;
- }
info->cq_base = (void *)((uintptr_t)info->sq_base +
info->sqe_size * info->sq_depth);
@@ -534,8 +535,24 @@ static int qm_set_queue_info(struct wd_queue *q)
goto err_with_regions;
}
+ ret = pthread_spin_init(&info->sd_lock, PTHREAD_PROCESS_PRIVATE);
+ if (ret) {
+ WD_ERR("failed to init qinfo sd_lock!\n");
+ goto free_cache;
+ }
+
+ ret = pthread_spin_init(&info->rc_lock, PTHREAD_PROCESS_PRIVATE);
+ if (ret) {
+ WD_ERR("failed to init qinfo rc_lock!\n");
+ goto uninit_lock;
+ }
+
return 0;
+uninit_lock:
+ pthread_spin_destroy(&info->sd_lock);
+free_cache:
+ free(info->req_cache);
err_with_regions:
qm_unset_queue_regions(q);
return ret;
@@ -576,8 +593,10 @@ void qm_uninit_queue(struct wd_queue *q)
struct q_info *qinfo = q->qinfo;
struct qm_queue_info *info = qinfo->priv;
- qm_unset_queue_regions(q);
+ pthread_spin_destroy(&info->rc_lock);
+ pthread_spin_destroy(&info->sd_lock);
free(info->req_cache);
+ qm_unset_queue_regions(q);
free(qinfo->priv);
qinfo->priv = NULL;
}
@@ -605,10 +624,10 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
int ret;
__u32 i;
- wd_spinlock(&info->sd_lock);
+ pthread_spin_lock(&info->sd_lock);
if (unlikely((__u32)__atomic_load_n(&info->used, __ATOMIC_RELAXED) >
info->sq_depth - num - 1)) {
- wd_unspinlock(&info->sd_lock);
+ pthread_spin_unlock(&info->sd_lock);
WD_ERR("queue is full!\n");
return -WD_EBUSY;
}
@@ -617,7 +636,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
ret = info->sqe_fill[qinfo->atype](req[i], qinfo->priv,
info->sq_tail_index);
if (unlikely(ret != WD_SUCCESS)) {
- wd_unspinlock(&info->sd_lock);
+ pthread_spin_unlock(&info->sd_lock);
WD_ERR("sqe fill error, ret %d!\n", ret);
return -WD_EINVAL;
}
@@ -629,7 +648,7 @@ int qm_send(struct wd_queue *q, void **req, __u32 num)
}
ret = qm_tx_update(info, num);
- wd_unspinlock(&info->sd_lock);
+ pthread_spin_unlock(&info->sd_lock);
return ret;
}
@@ -662,9 +681,9 @@ static int check_ds_rx_base(struct qm_queue_info *info,
return 0;
if (before) {
- wd_spinlock(&info->rc_lock);
+ pthread_spin_lock(&info->rc_lock);
qm_rx_from_cache(info, resp, num);
- wd_unspinlock(&info->rc_lock);
+ pthread_spin_unlock(&info->rc_lock);
WD_ERR("wd queue hw error happened before qm receive!\n");
} else {
WD_ERR("wd queue hw error happened after qm receive!\n");
@@ -705,7 +724,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
if (unlikely(ret))
return ret;
- wd_spinlock(&info->rc_lock);
+ pthread_spin_lock(&info->rc_lock);
for (i = 0; i < num; i++) {
cqe = info->cq_base + info->cq_head_index * sizeof(struct cqe);
if (info->cqc_phase != CQE_PHASE(cqe))
@@ -714,7 +733,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
mb(); /* make sure the data is all in memory before read */
sq_head = CQE_SQ_HEAD_INDEX(cqe);
if (unlikely(sq_head >= info->sq_depth)) {
- wd_unspinlock(&info->rc_lock);
+ pthread_spin_unlock(&info->rc_lock);
WD_ERR("CQE_SQ_HEAD_INDEX(%u) error\n", sq_head);
return -WD_EIO;
}
@@ -726,7 +745,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
if (!ret) {
break;
} else if (ret < 0) {
- wd_unspinlock(&info->rc_lock);
+ pthread_spin_unlock(&info->rc_lock);
WD_ERR("recv sqe error %u\n", sq_head);
return ret;
}
@@ -747,7 +766,7 @@ int qm_recv(struct wd_queue *q, void **resp, __u32 num)
ret = i;
}
- wd_unspinlock(&info->rc_lock);
+ pthread_spin_unlock(&info->rc_lock);
return ret;
}
diff --git a/v1/drv/hisi_qm_udrv.h b/v1/drv/hisi_qm_udrv.h
index 4d54cf6..06ac66a 100644
--- a/v1/drv/hisi_qm_udrv.h
+++ b/v1/drv/hisi_qm_udrv.h
@@ -166,8 +166,8 @@ struct qm_queue_info {
qm_sqe_parse sqe_parse[WCRYPTO_MAX_ALG];
hisi_qm_sqe_fill_priv sqe_fill_priv;
hisi_qm_sqe_parse_priv sqe_parse_priv;
- struct wd_lock sd_lock;
- struct wd_lock rc_lock;
+ pthread_spinlock_t sd_lock;
+ pthread_spinlock_t rc_lock;
struct wd_queue *q;
int (*sgl_info)(struct hw_sgl_info *info);
int (*sgl_init)(void *pool, struct wd_sgl *sgl);
diff --git a/v1/drv/hisi_rng_udrv.c b/v1/drv/hisi_rng_udrv.c
index 86a20cb..605ef27 100644
--- a/v1/drv/hisi_rng_udrv.c
+++ b/v1/drv/hisi_rng_udrv.c
@@ -17,6 +17,7 @@
#include <stdlib.h>
#include <unistd.h>
#include <stdio.h>
+#include <pthread.h>
#include <sys/mman.h>
#include <string.h>
#include <stdint.h>
@@ -34,6 +35,7 @@ int rng_init_queue(struct wd_queue *q)
{
struct q_info *qinfo = q->qinfo;
struct rng_queue_info *info;
+ int ret;
info = calloc(1, sizeof(*info));
if (!info) {
@@ -41,12 +43,20 @@ int rng_init_queue(struct wd_queue *q)
return -ENOMEM;
}
+ ret = pthread_spin_init(&info->lock, PTHREAD_PROCESS_PRIVATE);
+ if (ret) {
+ free(info);
+ WD_ERR("failed to init rng qinfo lock!\n");
+ return ret;
+ }
+
qinfo->priv = info;
info->mmio_base = wd_drv_mmap_qfr(q, WD_UACCE_QFRT_MMIO, 0);
if (info->mmio_base == MAP_FAILED) {
info->mmio_base = NULL;
- free(qinfo->priv);
qinfo->priv = NULL;
+ pthread_spin_destroy(&info->lock);
+ free(info);
WD_ERR("mmap trng mmio fail\n");
return -ENOMEM;
}
@@ -63,6 +73,7 @@ void rng_uninit_queue(struct wd_queue *q)
free(qinfo->priv);
qinfo->priv = NULL;
+ pthread_spin_destroy(&info->lock);
}
int rng_send(struct wd_queue *q, void **req, __u32 num)
@@ -70,14 +81,14 @@ int rng_send(struct wd_queue *q, void **req, __u32 num)
struct q_info *qinfo = q->qinfo;
struct rng_queue_info *info = qinfo->priv;
- wd_spinlock(&info->lock);
+ pthread_spin_lock(&info->lock);
if (!info->req_cache[info->send_idx]) {
info->req_cache[info->send_idx] = req[0];
info->send_idx++;
- wd_unspinlock(&info->lock);
+ pthread_spin_unlock(&info->lock);
return 0;
}
- wd_unspinlock(&info->lock);
+ pthread_spin_unlock(&info->lock);
WD_ERR("queue is full!\n");
return -WD_EBUSY;
@@ -128,16 +139,16 @@ int rng_recv(struct wd_queue *q, void **resp, __u32 num)
struct wcrypto_cb_tag *tag;
__u32 currsize = 0;
- wd_spinlock(&info->lock);
+ pthread_spin_lock(&info->lock);
msg = info->req_cache[info->recv_idx];
if (!msg) {
- wd_unspinlock(&info->lock);
+ pthread_spin_unlock(&info->lock);
return 0;
}
info->req_cache[info->recv_idx] = NULL;
info->recv_idx++;
- wd_unspinlock(&info->lock);
+ pthread_spin_unlock(&info->lock);
tag = (void *)(uintptr_t)msg->usr_tag;
if (usr && tag->ctx_id != usr)
diff --git a/v1/drv/hisi_rng_udrv.h b/v1/drv/hisi_rng_udrv.h
index 56814a4..3efa10e 100644
--- a/v1/drv/hisi_rng_udrv.h
+++ b/v1/drv/hisi_rng_udrv.h
@@ -29,7 +29,7 @@ struct rng_queue_info {
void *req_cache[TRNG_Q_DEPTH];
__u8 send_idx;
__u8 recv_idx;
- struct wd_lock lock;
+ pthread_spinlock_t lock;
};
int rng_init_queue(struct wd_queue *q);
--
2.25.1

55
0037-uadk-fix-for-hashagg-include-files.patch Normal file
View File

@ -0,0 +1,55 @@
From 50c8227aa41910090035c64b3a76035cab9089fa Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Fri, 1 Nov 2024 16:17:59 +0800
Subject: [PATCH 37/39] uadk: fix for hashagg include files
A compilation error occurred because the wd_util.h
is not an externally visible header file, so use
wd.h and wd_alg_common.h here.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
include/drv/wd_agg_drv.h | 1 +
include/wd_agg.h | 1 -
include/wd_dae.h | 1 +
3 files changed, 2 insertions(+), 1 deletion(-)
diff --git a/include/drv/wd_agg_drv.h b/include/drv/wd_agg_drv.h
index cf99a70..3d26eeb 100644
--- a/include/drv/wd_agg_drv.h
+++ b/include/drv/wd_agg_drv.h
@@ -8,6 +8,7 @@
#include <asm/types.h>
#include "wd_agg.h"
+#include "wd_util.h"
#ifdef __cplusplus
extern "C" {
diff --git a/include/wd_agg.h b/include/wd_agg.h
index e37023b..aac3d40 100644
--- a/include/wd_agg.h
+++ b/include/wd_agg.h
@@ -8,7 +8,6 @@
#include <dlfcn.h>
#include <asm/types.h>
-#include "wd_util.h"
#include "wd_dae.h"
#ifdef __cplusplus
diff --git a/include/wd_dae.h b/include/wd_dae.h
index 5f22d90..aa9f966 100644
--- a/include/wd_dae.h
+++ b/include/wd_dae.h
@@ -9,6 +9,7 @@
#include <dlfcn.h>
#include <stdbool.h>
#include <asm/types.h>
+#include "wd_alg_common.h"
#include "wd.h"
#ifdef __cplusplus
--
2.25.1

57
0038-uadk-fix-code-compatibility-issue.patch Normal file
View File

@ -0,0 +1,57 @@
From 710eef70b45b48e040022181fd28cc65883a8fb1 Mon Sep 17 00:00:00 2001
From: Qi Tao <taoqi10@huawei.com>
Date: Fri, 1 Nov 2024 16:19:31 +0800
Subject: [PATCH 38/39] uadk: fix code compatibility issue
The code check "req->in_bytes != req->out_bytes" is incompatible
with the software of other versions. Therefore, the check is deleted
and the size check of out_bytes and iv_bytes is added to the driver.
Signed-off-by: Qi Tao <taoqi10@huawei.com>
---
drv/hisi_sec.c | 4 ++--
wd_cipher.c | 6 ------
2 files changed, 2 insertions(+), 8 deletions(-)
diff --git a/drv/hisi_sec.c b/drv/hisi_sec.c
index bdde39f..10db124 100644
--- a/drv/hisi_sec.c
+++ b/drv/hisi_sec.c
@@ -751,7 +751,7 @@ static void update_iv(struct wd_cipher_msg *msg)
msg->iv_bytes, msg->iv_bytes);
break;
case WD_CIPHER_OFB:
- if (msg->in_bytes < msg->iv_bytes)
+ if (msg->in_bytes < msg->iv_bytes || msg->out_bytes < msg->iv_bytes)
break;
/* The iv_bytes has been checked and it is not greater than AES_BLOCK_SIZE. */
for (i = 0; i < msg->iv_bytes; i++)
@@ -793,7 +793,7 @@ static void update_iv_sgl(struct wd_cipher_msg *msg)
break;
case WD_CIPHER_OFB:
/* The iv_bytes has been checked and it is not greater than AES_BLOCK_SIZE. */
- if (msg->in_bytes >= msg->iv_bytes) {
+ if (msg->in_bytes >= msg->iv_bytes && msg->out_bytes >= msg->iv_bytes) {
hisi_qm_sgl_copy(in, msg->in,
msg->in_bytes - msg->iv_bytes,
msg->iv_bytes, COPY_SGL_TO_PBUFF);
diff --git a/wd_cipher.c b/wd_cipher.c
index 0e5de25..ec6fb15 100644
--- a/wd_cipher.c
+++ b/wd_cipher.c
@@ -646,12 +646,6 @@ static int wd_cipher_check_params(handle_t h_sess,
return -WD_EINVAL;
}
- if (unlikely(req->in_bytes != req->out_bytes)) {
- WD_ERR("cipher set out_bytes is error, size = %u\n",
- req->out_bytes);
- return -WD_EINVAL;
- }
-
ret = cipher_in_len_check(h_sess, req);
if (unlikely(ret))
return ret;
--
2.25.1

25
0039-Update-wd_design.md.patch Normal file
View File

@ -0,0 +1,25 @@
From 90fb6f227427f568e34337309075ed7a3f71bab9 Mon Sep 17 00:00:00 2001
From: Liulongfang <67134878+Liulongfang@users.noreply.github.com>
Date: Wed, 13 Nov 2024 11:51:59 +0800
Subject: [PATCH 39/39] Update wd_design.md
The current UADK framework has been changed from coupling HiSilicon hardware accelerator to being able to adapt to hardware acceleration and software acceleration. Thus realizing the driver dynamic loading function
---
docs/wd_design.md | 1 +
1 file changed, 1 insertion(+)
diff --git a/docs/wd_design.md b/docs/wd_design.md
index 3e5297e..ab39fb1 100644
--- a/docs/wd_design.md
+++ b/docs/wd_design.md
@@ -82,6 +82,7 @@
| | | sample_sched is moved from user space into UADK |
| | | framework. |
| 1.4 | |1) Update *wd_alg_init* reentrancy. |
+| 1.5 | |1) Added driver dynamic loading function. |
## Terminology
--
2.25.1

28
libwd.spec
View File

@ -2,7 +2,7 @@
Name: libwd
Summary: User Space Accelerator Development Kit
Version: 2.7.0
Release: 1
Release: 2
License: Apache-2.0
Source: %{name}-%{version}.tar.gz
@ -33,6 +33,29 @@ Patch0013: 0013-uadk-v1-update-the-symbol-table-for-libraries.patch
Patch0014: 0014-uadk-modify-address-check.patch
Patch0015: 0015-uadk-check-calloc-return-value.patch
Patch0016: 0016-drv-hisi-sec-modify-minor-errors-in-hisi_sec.c.patch
Patch0017: 0017-uadk-support-for-the-DAE-algorithm-layer.patch
Patch0018: 0018-drv-dae-support-hashagg-algorithm.patch
Patch0019: 0019-uadk_tool-use-wd_xxx_init2_-instead-of-wd_xxx_init2.patch
Patch0020: 0020-uadk-isa-ce-fix-sm4-CE-driver-initialization-error.patch
Patch0021: 0021-acc-uadk-fix-queue-configuration-parameter-error.patch
Patch0022: 0022-acc-uadk-fix-double-free-error.patch
Patch0023: 0023-uadk-fix-the-null-pointer-check-error.patch
Patch0024: 0024-uadk-add-null-pointer-check.patch
Patch0025: 0025-uadk-test-move-main-function-to-testsuit.c-and-rm.patch
Patch0026: 0026-uadk-fix-for-sec-software-compute-check.patch
Patch0027: 0027-uadk-fix-some-code-bugs.patch
Patch0028: 0028-uadk-cipher-add-length-check-of-CBC_CTS-mode.patch
Patch0029: 0029-uadk-fix-for-cipher-update-iv.patch
Patch0030: 0030-uadk-v1-fix-for-cipher-update-iv.patch
Patch0031: 0031-uadk-reduce-the-print-rating-of-specific-logs.patch
Patch0032: 0032-Revert-uadk-v1-replace-wd_spinlock-to-pthread_spin_l.patch
Patch0033: 0033-Revert-uadk-v1-check-queue-status-before-sending-doo.patch
Patch0034: 0034-uadk-v1-not-check-hardware-status-when-BD-not-proces.patch
Patch0035: 0035-uadk-v1-check-queue-status-before-sending-doorbells.patch
Patch0036: 0036-uadk-v1-replace-wd_spinlock-to-pthread_spin_lock.patch
Patch0037: 0037-uadk-fix-for-hashagg-include-files.patch
Patch0038: 0038-uadk-fix-code-compatibility-issue.patch
Patch0039: 0039-Update-wd_design.md.patch
%description
This package contains the User Space Accelerator Library
@ -111,6 +134,9 @@ rm -rf ${RPM_BUILD_ROOT}
/sbin/ldconfig
%changelog
* Tue Nov 19 2024 JiangShui Yang <yangjiangshui@h-partners.com> 2.7.0-2
- libwd: update the source code
* Fri Aug 23 2024 JiangShui Yang <yangjiangshui@h-partners.com> 2.7.0-1
- libwd: update the source code to 2.7.0