From bd23d5c22df1b5174c073c933d40c1a17204f2a2 Mon Sep 17 00:00:00 2001
From: huangji <huangji@iscas.ac.cn>
Date: Tue, 5 Nov 2024 09:40:31 +0000
Subject: [PATCH 4/4] add riscv64 support

Signed-off-by: huangji <huangji@iscas.ac.cn>
---
 config/config.guess               | 3 +++
 configure                         | 2 ++
 src/common/port/CMakeLists.txt    | 8 ++++++++
 src/include/storage/lock/s_lock.h | 2 +-
 4 files changed, 14 insertions(+), 1 deletion(-)

diff --git a/config/config.guess b/config/config.guess
index 15f22ac..71c5ca3 100644
--- a/config/config.guess
+++ b/config/config.guess
@@ -963,6 +963,9 @@ EOF
 	loongarch*:Linux:*:*)
 	echo "$UNAME_MACHINE"-linux-"$LIBC"
 	exit ;;
+    riscv32:Linux:*:* | riscv64:Linux:*:*)
+	echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"
+	exit ;;
     mips:Linux:*:* | mips64:Linux:*:*)
 	eval $set_cc_for_build
 	sed 's/^	//' << EOF >$dummy.c
diff --git a/configure b/configure
index d4f0bf5..c600ba8 100755
--- a/configure
+++ b/configure
@@ -29069,6 +29069,8 @@ if [ "$PLATFORM_ARCH"X == "aarch64"X ] ; then
   else
     CFLAGS="-march=armv8-a+crc $CFLAGS"
   fi
+elif [ "$PLATFORM_ARCH"X == "riscv64"X ] ; then
+        CFLAGS="-march=rv64g $CFLAGS"
 elif [ "$PLATFORM_ARCH"X == "x86_64"X ] ; then
 	CFLAGS="-mcx16 $CFLAGS_SSE42 $CFLAGS"
 else
diff --git a/src/common/port/CMakeLists.txt b/src/common/port/CMakeLists.txt
index b9a6a28..e511eb0 100755
--- a/src/common/port/CMakeLists.txt
+++ b/src/common/port/CMakeLists.txt
@@ -94,6 +94,10 @@ if("${BUILD_TUPLE}" STREQUAL "loongarch64")
     list(REMOVE_ITEM TGT_port_SRC ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_sse42.cpp)
 endif()
 
+if("${BUILD_TUPLE}" STREQUAL "riscv64")
+    list(REMOVE_ITEM TGT_port_SRC ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_sse42.cpp)
+endif()
+
 SET(TGT_pgport_INC 
     ${PROJECT_SRC_DIR}/common/backend
     ${PROJECT_SRC_DIR}/common/port
@@ -167,6 +171,10 @@ if("${BUILD_TUPLE}" STREQUAL "loongarch64")
     list(REMOVE_ITEM TGT_pgport_srv_SRC ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_sse42.cpp)
 endif()
 
+if("${BUILD_TUPLE}" STREQUAL "riscv64")
+    list(REMOVE_ITEM TGT_pgport_srv_SRC ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_sse42.cpp)
+endif()
+
 SET(TGT_pgport_srv_INC 
     ${PROJECT_SRC_DIR}/common/backend
     ${PROJECT_SRC_DIR}/common/port
diff --git a/src/include/storage/lock/s_lock.h b/src/include/storage/lock/s_lock.h
index 715d84a..bf7b041 100644
--- a/src/include/storage/lock/s_lock.h
+++ b/src/include/storage/lock/s_lock.h
@@ -283,7 +283,7 @@ static __inline__ int tas(volatile slock_t* lock)
  * the int-width variant of the builtin works on more chips than other widths.
  */
 
-#if defined(__aarch64__) || defined(__aarch64)
+#if defined(__aarch64__) || defined(__aarch64) || defined(__riscv)
 
 #ifdef ENABLE_THREAD_CHECK
 extern "C" {
-- 
2.33.0