82 lines
3.0 KiB
Diff
82 lines
3.0 KiB
Diff
From bd23d5c22df1b5174c073c933d40c1a17204f2a2 Mon Sep 17 00:00:00 2001
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From: huangji <huangji@iscas.ac.cn>
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Date: Tue, 5 Nov 2024 09:40:31 +0000
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Subject: [PATCH 4/4] add riscv64 support
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Signed-off-by: huangji <huangji@iscas.ac.cn>
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---
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config/config.guess | 3 +++
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configure | 2 ++
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src/common/port/CMakeLists.txt | 8 ++++++++
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src/include/storage/lock/s_lock.h | 2 +-
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4 files changed, 14 insertions(+), 1 deletion(-)
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diff --git a/config/config.guess b/config/config.guess
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index 15f22ac..71c5ca3 100644
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--- a/config/config.guess
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+++ b/config/config.guess
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@@ -963,6 +963,9 @@ EOF
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loongarch*:Linux:*:*)
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echo "$UNAME_MACHINE"-linux-"$LIBC"
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exit ;;
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+ riscv32:Linux:*:* | riscv64:Linux:*:*)
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+ echo "$UNAME_MACHINE"-unknown-linux-"$LIBC"
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+ exit ;;
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mips:Linux:*:* | mips64:Linux:*:*)
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eval $set_cc_for_build
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sed 's/^ //' << EOF >$dummy.c
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diff --git a/configure b/configure
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index d4f0bf5..c600ba8 100755
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--- a/configure
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+++ b/configure
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@@ -29069,6 +29069,8 @@ if [ "$PLATFORM_ARCH"X == "aarch64"X ] ; then
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else
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CFLAGS="-march=armv8-a+crc $CFLAGS"
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fi
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+elif [ "$PLATFORM_ARCH"X == "riscv64"X ] ; then
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+ CFLAGS="-march=rv64g $CFLAGS"
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elif [ "$PLATFORM_ARCH"X == "x86_64"X ] ; then
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CFLAGS="-mcx16 $CFLAGS_SSE42 $CFLAGS"
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else
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diff --git a/src/common/port/CMakeLists.txt b/src/common/port/CMakeLists.txt
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index b9a6a28..e511eb0 100755
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--- a/src/common/port/CMakeLists.txt
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+++ b/src/common/port/CMakeLists.txt
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@@ -94,6 +94,10 @@ if("${BUILD_TUPLE}" STREQUAL "loongarch64")
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list(REMOVE_ITEM TGT_port_SRC ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_sse42.cpp)
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endif()
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+if("${BUILD_TUPLE}" STREQUAL "riscv64")
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+ list(REMOVE_ITEM TGT_port_SRC ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/pg_crc32c_sse42.cpp)
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+endif()
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+
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SET(TGT_pgport_INC
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${PROJECT_SRC_DIR}/common/backend
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${PROJECT_SRC_DIR}/common/port
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@@ -167,6 +171,10 @@ if("${BUILD_TUPLE}" STREQUAL "loongarch64")
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list(REMOVE_ITEM TGT_pgport_srv_SRC ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_sse42.cpp)
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endif()
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+if("${BUILD_TUPLE}" STREQUAL "riscv64")
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+ list(REMOVE_ITEM TGT_pgport_srv_SRC ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_choose.cpp ${CMAKE_CURRENT_SOURCE_DIR}/port_srv/pg_crc32c_sse42.cpp)
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+endif()
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+
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SET(TGT_pgport_srv_INC
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${PROJECT_SRC_DIR}/common/backend
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${PROJECT_SRC_DIR}/common/port
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diff --git a/src/include/storage/lock/s_lock.h b/src/include/storage/lock/s_lock.h
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index 715d84a..bf7b041 100644
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--- a/src/include/storage/lock/s_lock.h
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+++ b/src/include/storage/lock/s_lock.h
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@@ -283,7 +283,7 @@ static __inline__ int tas(volatile slock_t* lock)
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* the int-width variant of the builtin works on more chips than other widths.
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*/
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-#if defined(__aarch64__) || defined(__aarch64)
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+#if defined(__aarch64__) || defined(__aarch64) || defined(__riscv)
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#ifdef ENABLE_THREAD_CHECK
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extern "C" {
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--
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2.33.0
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